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LH530800A-Y Datasheet

  • LH530800A-Y

  • CMOS 1M (128K x 8) 3 V-Drive MROM

  • 6頁

  • SHARP

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LH530800A-Y
FEATURES
鈥?/div>
131,072 words
脳
8 bit organization
鈥?/div>
Access times:
500 ns (MAX.) at 2.6 V
鈮?/div>
V
CC
< 4.5 V
150 ns (MAX.) at 4.5 V
鈮?/div>
V
CC
鈮?/div>
5.5 V
鈥?/div>
Low-power consumption:
Operating: 193 mW (MAX.)
Standby: 550
碌W
(MAX.)
鈥?/div>
Static operation
鈥?/div>
Three-state outputs
鈥?/div>
Mask-programmable control pin:
Pin 24 = OE/OE
鈥?/div>
Wide range power supply:
2.6 V to 5.5 V
鈥?/div>
Packages:
32-pin, 600-mil DIP
32-pin, 525-mil SOP
DESCRIPTION
The LH530800A-Y is a 1M-bit mask-programmable
ROM organized as 131,072
脳
8 bits. It is fabricated
using silicon-gate CMOS process technology.
CMOS 1M (128K
脳
8) 3 V-Drive MROM
PIN CONNECTIONS
32-PIN DIP
32-PIN SOP
NC
A
16
A
15
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
D
0
D
1
D
2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
NC
NC
A
14
A
13
A
8
A
9
A
11
OE/OE
A
10
CE
D
7
D
6
D
5
D
4
D
3
TOP VIEW
530800A-Y-1
Figure 1. Pin Connections for DIP and
SOP Packages
1

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