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LH28F004SU-LC Datasheet

  • LH28F004SU-LC

  • 4M (512K 】 8) Flash Memory

  • 31頁

  • SHARP

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LH28F004SU-LC
FEATURES
40-PIN TSOP
4M (512K 脳 8) Flash Memory
TOP VIEW
鈥?/div>
512K 脳 8 Word Configuration
鈥?/div>
5 V Write/Erase Operation
(5 V V
PP
, 3.3 V V
CC
)
鈥?No Requirement for DC/DC Converter to
Write/Erase
A
16
A
15
A
14
A
13
A
12
A
11
A
9
A
8
WE
RP
V
PP
RY/BY
A
18
A
7
A
6
A
5
A
4
A
3
A
2
A
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
A
17
GND
NC
NC
A
10
DQ
7
DQ
6
DQ
5
DQ
4
V
CC
V
CC
NC
DQ
3
DQ
2
DQ
1
DQ
0
OE
GND
CE
A
0
鈥?/div>
120 ns Maximum Access Time
(V
CC
= 3.3 V 鹵 0.3 V)
鈥?/div>
Min. 2.7 V Read Capability
鈥?160 ns Maximum Access Time
(V
CC
= 2.7 V)
鈥?/div>
32 Independently Lockable Blocks
鈥?/div>
100,000 Erase Cycles per Block
鈥?/div>
Automated Byte Write/Block Erase
鈥?Command User Inferface
鈥?Status Register
鈥?RY
聽
/BY
聽 祿
Status Output
祿
鈥?/div>
System Performance Enhancement
鈥?Erase Suspend for Read
鈥?Two-Byte Write
鈥?Full Chip Erase
28F004SUT-LC12-1
鈥?/div>
Data Protection
鈥?Hardware Erase/Write Lockout during
Power Transitions
鈥?Software Erase/Write Lockout
Figure 1. TSOP Configuration
鈥?/div>
Independently Lockable for Write/Erase
on Each Block (Lock Block and Protect
Set/Reset)
鈥?/div>
4 碌A(chǔ) (Typ.) I
CC
in CMOS Standby
鈥?/div>
0.2 碌A(chǔ) (Typ.) Deep Power-Down
鈥?/div>
State-of-the-Art 0.55 碌m ETOX鈩?Flash
Technology
鈥?/div>
Extended Temperature Operation Available
鈥?-40擄C to +85擄C
鈥?/div>
40-Pin, 1.2 mm 脳 10 mm 脳 20 mm TSOP
(Type I) Package
1

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