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LF3312 Datasheet

  • LF3312

  • 12-Mbit Frame Buffer / FIFO

  • 33頁(yè)

  • LOGIC

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LF3312
12-Mbit Frame Buffer / FIFO
DEVICES INCORPORATED
Preliminary Datasheet
Features
12,441,600-bit Frame Memory
74.25MHz Max Data Rate
May be Organized Into the Following
Configurations:
鈥?1,555,200 x 8-bit (single channel)
鈥?1,244,160 x 10-bit (single channel)
鈥?1,036,800 x 12-bit (single channel)
鈥?777,600 x 16-bit (width expansion - dual channel)
鈥?622,080 x 20-bit (width expansion - dual channel)
鈥?518,400 x 24-bit (width expansion - dual channel)
鈥?777,600 x 8-bit (each of two parallel channels)
鈥?622,080 x 10-bit (each of two parallel channels)
鈥?518,400 x 12-bit (each of two parallel channels)
Operating Modes:
鈥?Random Access with External Address Port
(Single-channel)
鈥?FIFO With Asynchronous I/O (Single-channel)
鈥?FIFO With Asynchronous I/O (Dual-channel)
鈥?Synchronous Shift Register (Single-channel)
鈥?Synchronous Shift Register (Dual-channel)
鈥?FIFO + shift register; Channel B Synchronized to
Channel A
鈥?Shift register + FIFO; One channel Synchronized
to the other
Near-Full/Empty Flags With Programmable
Thresholds
Flexible Pointer Manipulation
鈥?Write and Read Pointers may be indepen-
dently jumped to arbitrary address locations
鈥?Write or Read Pointers can be manipulated
in real-time based on external 24bit address
LF3312s may be Cascaded for depth and
width, supporting HDTV, Multiframe SDTV,
and other high resolution formats
鈥?Seamless address space is maintained
with up to 16 cascaded devices
Built-in ITU-R BT.656 TRS detection and
Synchronization
Set & Clear Read/Write Pointer Control Pins
Choice of Control Interfaces:
鈥?Two-wire Serial Microprocessor Interface
鈥?Parallel Microprocessor Interface
Input Enable Control (Write Mask) for freeze-
frame applications
Output Enable Control (Data Skipping)
JTAG Boundary Scan - IEEE 1149.1
172 ball LBGA package
1.8V Internal Core Power Supply
3.3V I/O Supply
NOTE:
This
Preliminary Datasheet
references
LF3312BGC
Engineering Samples
with an
ES
marking under the part designation.
Applications
DTV/HDTV Video Stream Buffer
Frame Synchronization
CCTV Security Camera Systems
Time Base Correction (TBC)
Freeze-Frame Buffer
Regional Read/Write for Picture-in-Picture (PIP)
Field-Based or Frame-Based Comb Filtering
Video Capture & Editing Systems
Deep Data Buffering
Video Special Effects (Rotation, Zoom)
Test Pattern Generation
Motion Detection or Frame-to-Frame Correlation
LOGIC Devices Incorporated
1
Video Imaging Product
August 8, 2006 LDS.3312 O

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