Ordering number : EN*5440
MOS LSI
LC89950
1H Delay Line for PAL Systems
Preliminary
Overview
The LC89950 is an IC that provides 1H delay processing
for color difference signals used in PAL and SECAM
format TV. The LC89950 has two CCD systems, one for
the R-Y and one for the B-Y signal, and drives these
CCDs with a 4-MHz clock generated within the IC. It uses
a sandcastle-shaped three-value input clock with a 1 H (64
碌s) period.
鈥?Auto-bias and input clamping circuits
鈥?4-MHz output circuit
Package Dimensions
unit: mm
3003A-DIP14
[LC89950]
Features
鈥?5-V single-voltage power supply
鈥?Two input and output systems, one each for R-Y and B-
Y signals
鈥?Takes a sandcastle pulse (SCP) as the input clock, and
converts that to a burst gate pulse (BGP) signal
internally.
鈥?Generates the CCD drive pulses (4 MHz) from the input
clock using a PLL circuit.
鈥?Uses BGP as clamp pulses and clamps the no signal
section (back porch) once every horizontal scan period.
鈥?The output signal is in-phase with the input signal
SANYO: DIP14
Functions
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Two on-chip 254.5-bit CCD shift registers
CCD drive circuits
Sample-and-hold circuit
Burst gate pulse detection circuit
256
脳
PLL circuit
Specifications
Absolute Maximum Ratings
at Ta = 25擄C
Parameter
Supply voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
V
DD
Pd max
Topr
Tstg
Conditions
Ratings
鈥?.3 to +6.0
450
鈥?0 to +60
鈥?5 to +125
Unit
V
mW
擄C
擄C
Allowable Operating Ranges
at Ta = 25擄C
Parameter
Supply voltage
Input signal amplitude
Symbol
V
DD
V
INPP(R-Y)
V
INPP(B-Y)
Conditions
min
4.75
typ
5.0
500
500
max
5.25
700
700
Unit
V
mV
mV
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
D3097HA(OT) No. 5440-1/5
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