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I/O channel.
Performs unscrambling and de-interleaving to reorder
the demodulated EFM signal in the prescribed manner.
Performs error code detection and correction, and flag
processing. (C1: dual errors, C2: four errors)
Sets the C2 flags based on the C1 flags and a C2 check,
and performs interpolation or muting depending on the
C2 flags. Adopts a 2-point interpolation circuit, and
converges the signal to the muting level if the C2 flags
indicate over 2 consecutive uncorrectable errors.
Accepts the input of commands from a control
microprocessor over an 8-bit parallel interface. Supports
track jump, disc motor start/stop, muting on/off, and
track counting commands.
Can perform arbitrary track counts.
Includes CAV audio functions.
Adopts zero-cross muting.
Includes 8脳 oversampling digital filters.
D/A converter with PWM output.
Includes independent left and right channel digital
attenuators.
Provides digital deemphasis.
Supports bilingual functions.
Functions
鈥?Full CAV 20脳 CD-DSP and CD-ROM decoder
functions with built-in ATA-PI (IDE) interface
Features
[CD-ROM Decoder and ATA-PI (IDE) Interface Blocks]
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Full CAV 20脳 operation
ATA-PI (IDE) interface
Supports the use of EDO DRAM.
Supports the use of up to 4 Mbits of buffer RAM.
The user can set up arbitrary CD main channel and C2
flag areas in buffer RAM.
Batch transfer function (function that automatically
transfers the CD main channel and C2 flag data in a
single operation.)
Multi-block transfer function (function that
automatically transfers multiple blocks in a single
operation.)
DVD ECC interface
Intelligent functions
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Package Dimensions
unit: mm
3230-SQFP176
[LC897297]
[CD-DSP Block]
鈥?The IC inputs a high-frequency signal, slices that signal
at the correct level, converts that result to an EFM coded
signal, and compares the phase with that of the built-in
VCO.
鈥?Uses an external 16.9344-MHz crystal element to
generate a standard clock and to correctly generate the
required internal timings.
鈥?Performs frame synchronization, signal detection,
protection, and insertion, and assures stable data
readout.
鈥?Demodulates the EFM coded signal to produce 8-bit
symbol data.
鈥?After applying a CRC check to the subcode Q signal,
outputs that signal to a microprocessor over a parallel
SANYO: SQFP176
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-0005 JAPAN
22898HA (OT) No. 5785-1/9
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