鈥?/div>
Functions
鈥?Input signal processing: The LC78622E takes an HF
signal as input, digitizes (slices) that signal at a precise
level, converts that signal to an EFM signal, and
generates a PLL clock with an average frequency of
4.3218 MHz by comparing the phases of that signal and
an internal VCO.
鈥?Precise reference clock and necessary internal timing
generation using an external 16.9344 MHz crystal
oscillator
鈥?Disk motor speed control using a frame phase difference
signal generated from the playback clock and the
reference clock
鈥?Frame synchronization signal detection, protection and
interpolation to assure stable data readout
鈥?EFM signal demodulation and conversion to 8-bit
symbol data
鈥?Subcode data separation from the EFM demodulated
signal and output of that data to an external
microprocessor
鈥?Subcode Q signal output to a microprocessor over the
serial I/O interface after performing a CRC error check
(LSB first)
鈥?Demodulated EFM signal buffering in internal RAM to
handle up to 鹵4 frames of disk rotational jitter
鈥?Demodulated EFM signal reordering in the prescribed
order for data unscrambling and de-interleaving
鈥?Error detection, correction, and flag processing (error
correction scheme: dual C1 plus dual C2 correction)
鈥?The LC78622E sets the C2 flags based on the C1 flags
and a C2 check, and then performs signal interpolation
or muting depending on the C2 flags. The interpolation
circuit uses a dual-interpolation scheme. The previous
value is held if the C2 flags indicate errors two or more
times consecutively.
Support for command input from a control
microprocessor: commands include track jump, focus
start, disk motor start/stop, muting on/off and track
count (8 bit serial input)
Built-in digital output circuits.
Arbitrary track counting to support high-speed data
access
D/A converter outputs with data continuity improved by
4脳 oversampling digital filters.
Built-in third-order
鈭戔垎
D/A converters (An analog low-
pass filter is built in.)
Built-in digital attenuator (8 bits 鈥?alpha, 239 steps)
Built-in digital de-emphasis
Zero cross muting
Supports the implementation of a double-speed dubbing
function.
Support for bilingual applications.
General-purpose I/O ports: 5 pins
Features
鈥?5 V single-voltage power supply
鈥?Supports low-voltage operation (3.0 V, minimum)
Package Dimensions
unit: mm
3159-QFP64E
[LC78622E]
SANYO: QFP64E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
93096HA (OT) No. 5467-1/29