鈥?/div>
Fabricated in a CMOS (P-sub) high-voltage process.
LCD drive voltage: 36 V
Logic system power-supply voltage: 2.7 to 5.5 V
fcp max: 2.5 MHz
Slim chip (output pads are concentrated on one of the
longer sides)
Bidirectional shift register
The shift register can be split into two 60-bit registers.
(Two screens drivable)
DISPOFF function that locks the drive voltages output
to the LCD at fixed levels.
Display duty: 1/160 to 1/480
Appropriate for COG (chip on glass) mounting. (A gold
bump structure is adopted in the pad areas.)
Specifications
The electrical characteristics values shown below are for devices encapsulated in the Sanyo standard PGA-208 package.
Absolute Maximum Ratings
at V
SS
= 0 V
Parameter
Symbol
V
DD
max
Supply voltage
V
EE
max
V
SSH
max
V
IN
Input voltage
V0, V1
V4
V5
Operating temperature
Storage temperature
Topr
Tstg
V
DD
V
EE
V
SSH
*
1
V0, V1
*
2
V4
*
2
V5
*
2
Applicable pins
Ratings
min
鈥?.3
鈥?.3
鈥?.3
鈥?.3
V
EE
鈥?7.0
鈥?.3
鈥?.3
鈥?0
鈥?5
typ
max
7.0
40.0
0.3
V
DD
+ 0.3
V
EE
+ 0.3
V
SS
+ 7.0
+0.3
+75
+125
Unit
V
V
V
V
V
V
V
擄C
擄C
Note: 1. LOAD, RS/LS, DISP, DF, DIO1, DIO120, DMIN and MODE
2. The voltages V0, V1, V4, and V5 must obey the relationships V
EE
鈮?/div>
V0
鈮?/div>
V1
鈮?/div>
V
EE
鈥?7 V, and 7 V
鈮?/div>
V4
鈮?/div>
V5
鈮?/div>
V
SSH
.
Allowable Operating Ranges
at V
SS
= 0 V, Ta = 鈥?0 to +75擄C
Parameter
Symbol
V
DD
Supply voltage
V
EE
V
SSH
Input high-level voltage
Input low-level voltage
V
IH
V
IL
V0, V1
Input voltage
V4
V5
V
DD
V
EE
V
SSH
*
1
*
1
V0, V1
*
2
V4
*
2
V5
*
2
0.8
脳
V
DD
0
V
EE
鈥?7.0
0
0
Applicable pins
Ratings
min
2.7
14
0
V
DD
0.2
脳
V
DD
V
EE
V
SSH
+ 7.0
typ
max
5.5
36
Unit
V
V
V
V
V
V
V
V
Note: 1. LOAD, RS/LS, DISP, DF, DIO1, DIO120, DMIN and MODE
2. The voltages V0, V1, V4, and V5 must obey the relationships V
EE
鈮?/div>
V0
鈮?/div>
V1
鈮?/div>
V
EE
鈥?7 V, and 7 V
鈮?/div>
V4
鈮?/div>
V5
鈮?/div>
V
SSH
.
When turning on the power supplies, first turn on the logic system power supply and then turn on the high-voltage system power supply; alternatively,
turn both on at the same time.
When turning off the power supplies, first turn off the high-voltage system power supply and then turn off the logic system power supply; alternatively,
turn both off at the same time.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
40398RM (OT) No. 5953-1/7
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