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Member of LAN9118 Family; optimized for medium-
performance applications
Easily interfaces to most 16-bit embedded CPU鈥檚
Efficient architecture with low CPU overhead
Integrated PHY; supports external PHY via MII
interface
Supports audio & video streaming over Ethernet:
multiple standard-definition (SD) MPEG2 streams
Medium-speed member of LAN9118 Family
(all members are pin-compatible)
Numerous power management modes
Wake on LAN
Magic packet wakeup
Wakeup indicator event signal
Link Status Change
Fully compliant with IEEE 802.3/802.3u standards
Integrated Ethernet MAC and PHY
10BASE-T and 100BASE-TX support
Full- and Half-duplex support
Full-duplex flow control
Backpressure for half-duplex flow control
Preamble generation and removal
Automatic 32-bit CRC generation and checking
Automatic payload padding and pad removal
Loop-back modes
One 48-bit perfect address
64 hash-filtered multicast addresses
Pass all multicast
Promiscuous mode
Inverse filtering
Pass all incoming with status report
Disable reception of broadcast packets
Single chip Ethernet controller
鈥?/div>
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鈥?/div>
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鈥?/div>
Target Applications
鈻?/div>
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鈻?/div>
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鈻?/div>
鈻?/div>
Printers, kiosks, security systems
General embedded applications
Audio distribution systems
Basic Cable, satellite, and IP set-top boxes
Video-over IP Solutions, IP PBX & Video Phones
Wireless routers & access points
Digital video recorders
鈻?/div>
Flexible address filtering modes
鈥?/div>
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Integrated Ethernet PHY
鈥?Auto-negotiation
鈥?Automatic polarity detection and correction
Key Benefits
鈻?/div>
鈻?/div>
Efficient host bus interface
鈥?Simple, SRAM-like interface
鈥?16-bit data bus
鈥?Large, 16Kbyte FIFO memory that can be allocated to
RX or TX functions
鈥?One configurable Host interrupt
Non-PCI Ethernet controller for medium-performance
applications
鈥?16-bit interface
鈥?Burst-mode read support
鈻?/div>
Eliminates dropped packets
鈥?Internal SRAM can store over 200 packets
鈥?Supports automatic or host-triggered PAUSE and back-
pressure flow control
鈻?/div>
Miscellaneous features
鈥?Low profile 100-pin TQFP package; green, lead-free
package also available
鈥?Integral 1.8V regulator
鈥?General Purpose Timer
鈥?Support for optional EEPROM
鈥?Support for 3 status LEDs multiplexed with
Programmable GPIO signals
鈻?/div>
Minimizes CPU overhead
鈥?Supports Slave-DMA
鈥?Interrupt Pin with Programmable Hold-off timer
鈻?/div>
Reduces system cost and increases design flexibility
鈥?SRAM-like interface easily interfaces to most
Embedded CPU鈥檚 or SoC鈥檚
鈥?Low-cost, low-pin count non-PCI interface for
embedded designs
鈻?/div>
鈻?/div>
3.3V Power Supply with 5V tolerant I/O
0 to 70擄C
SMSC LAN9115
PRODUCT PREVIEW
Revision 0.1 (12-20-04)
LAN9115-MD 產(chǎn)品屬性
SMSC
以太網(wǎng) IC
Ethernet Controllers
1
802.3
10 MB, 100 MB
3.3 V
1.8 V
+ 70 C
TQFP-100
10 Base-T, 100 Base-TX
0 C
SMD/SMT
450
Single Chip MAC and PHY
LAN9115-MD相關(guān)型號PDF文件下載
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