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L84225 Datasheet

  • L84225

  • L84225 100BaseTX/FX/10BaseT Physical Layer Device technical ...

  • 118頁

  • ETC

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L84225 100BaseTX/FX/10BaseT
Physical Layer Device
Technical Manual
Features
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Single-chip 100BaseTX/100BaseFX/
10BaseT physical layer solution
Four independent Channels in One IC
3.3 V power supply with 5 V tolerant I/O
Dual Speed - 10/100 Mbps
Half and Full Duplex
MII interface or reduced pin count MII
(RMII) interface to Ethernet Controller
MI interface for con鏗乬uration and status
Optional Repeater Interface
AutoNegotiation for 10/100, Full/Half
Duplex hardware controlled
advertisement
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Meets all applicable IEEE 802.3,
10BaseT, 100BaseTX and 100BaseFX
standards
On-chip wave shaping - no external
鏗乴ters required
Adaptive Equalizer for 100BaseTX
Baseline Wander Correction
LED outputs
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Link, Activity, Collision
Full Duplex
Far End Fault (for FX)
10/100
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160L PQFP
Contents
Description
- - - - - - - - - - - - - - - - - - - - - 2
Pin Description
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Functional Description
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Register Description-
- - - - - - - - - - - - - -57
Application Information
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Note:
Check for the latest revision of this document before start-
ing any designs. This document is available on the Web, at
www.lsilogic.com
1 of 118
Speci鏗乧ations
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Ordering Information
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Revision History
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Surface Mount Packages
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MD400183/B
April, 2002
Copyright 漏 1999-2002 by LSI Logic Corporation. All rights reserved.

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