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L64118 Datasheet

  • L64118

  • L64118 Transport with embedded MIPS CPU

  • 68頁

  • ETC

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L64118 MPEG-2 Transport
Controller with
Embedded MIPS CPU (TR4101)
Preliminary Datasheet
LSI Logic鈥檚 L64118 MPEG-2 Transport Controller with Embedded MIPS
CPU (TR4101) is a highly integrated set-top box control and
communication device, combining most of the logic needed for a digital
broadcast system (DBS) or cable set-top box onto a single chip. The
L64118鈥檚 embedded 32-bit TinyRISC鈩?MIPS CPU core provides
processing power to support transport and system data, as well as
general-purpose system control.
The L64118 interfaces directly to LSI Logic鈥檚 L64704 and L64724
(satellite), and the L64768 (cable) single-chip channel decoders, as well
as to the L64105 MPEG-2 A/V decoder.
The MPEG-2 transport and system demultiplexer can handle 32 Packet
Identi鏗乧ations (PIDs) simultaneously, including audio, video, and general-
purpose data services. It integrates a Digital Video Broadcasting (DVB)-
compliant descrambler block, substantially increasing the security of the
set-top box.
The L64118鈥檚 synchronous External System Bus (EBus) communicates
with external peripherals. The L64118 communicates with peripherals
through serial, parallel, SmartCard, and infrared ports. Several general-
purpose I/O pins are provided that let system designers expand the
system鈥檚 capabilities.
The L64118 supports industry-standard SDRAM memory of up to
16 Mbytes, using 16 and 64 Mbit SDRAMs. The SDRAM interface
supports PC66/100-compliant SDRAMS.
The L64118 is offered in LSI Logic鈥檚 3.3 V G10
廬
-p cell-based technology
and is packaged in a 256-pin PBGA (IF) package.
廬
February 1999
Copyright 漏 1997, 1998 by LSI Logic Corporation. All rights reserved.
1

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