<0.013鈩?/div>
I
D
13A
(4)
Improved die-to-footprint ratio
Very low profile package (1mm max)
Very low thermal resistance
Very low gate charge
Low threshold device
PowerFLAT鈩? 6x5 )
Description
This application specific Power MOSFET is the
latest generation of STMicroelectronics unique
鈥淪TripFET鈩⑩€?technology. The resulting transistor
is optimized for low on-resistance and minimal
gate charge. The Chip-scaled PowerFLAT鈩?/div>
package allows a significant board space saving,
still boosting the performance.
Internal schematic diagram
Applications
鈻?/div>
Switching application
Order codes
Part number
STL50NH3LL
Marking
L50NH3LL
Package
PowerFLAT鈩?(6x5)
Packaging
Tape & reel
September 2006
Rev 9
1/12
www.st.com
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