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KSZ8995XA Datasheet

  • KSZ8995XA

  • Integrated 5-Port 10/100 QoS Switch

  • 305.34KB

  • 51頁(yè)

  • MICREL   MICREL

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KS8995XA
Micrel, Inc.
KS8995XA
Integrated 5-Port 10/100 QoS Switch
Rev. 2.3
General Description
The KS8995XA is a highly integrated Layer-2 quality of
service (QoS) switch with optimized bill of materials (BOM)
cost for low port count, cost-sensitive 10/100Mbps switch
systems. It also provides an extensive feature set including
three different QoS priority schemes, a dual MII interface for
BOM cost reduction, rate limiting to offload CPU tasks,
software and hardware power-down, a MDC/MDIO control
interface and port mirroring/monitoring to effectively address
both current and emerging Fast Ethernet applications.
The KS8995XA contains five 10/100 transceivers with pat-
ented mixed-signal low-power technology, five media access
control (MAC) units, a high-speed non-blocking switch fabric,
a dedicated address lookup engine, and an on-chip frame
buffer memory.
All PHY units support 10BASE-T and 100BASE-TX. In addi-
tion, two of the PHY units support 100BaseFX (Ports 4 and 5).
Features
鈥?Integrated switch with five MACs and five Fast Ethernet
transceivers fully compliant to IEEE 802.3u standard
鈥?Shared memory based switch fabric with fully non-
blocking configuration
鈥?10BASE-T, 100BASE-TX and 100BASE-FX modes
(FX in Ports 4 and 5)
鈥?Dual MII configuration: MII-Switch (MAC or PHY
mode MII) and MII-P5 (PHY mode MII)
鈥?VLAN ID tag/untag options, per-port basis
鈥?Enable/disable option for huge frame size up to
1916 bytes per frame
鈥?Broadcast storm protection with percent control 鈥?/div>
global and per-port basis
鈥?Optimization for fiber-to-copper media conversion
鈥?Full-chip hardware power-down support (register
configuration not saved)
鈥?Per-port-based software power-save on PHY
(idle link detection, register configuration preserved)
鈥?QoS/CoS packets prioritization supports: per port,
802.1p and DiffServ-based
Functional Diagram
Auto
MDI/MDI-X
Auto
MDI/MDI-X
Auto
MDI/MDI-X
Auto
MDI/MDI-X
Auto
MDI/MDI-X
MII-P5
MDC, MDI/O
MII-SW or SNI
LED0[5:1]
LED1[5:1]
LED2[5:1]
10/100
T/Tx 1
10/100
T/Tx 2
10/100
T/Tx 3
10/100
T/Tx/Fx 4
10/100
T/Tx/Fx 5
10/100
MAC 1
1K Look-Up
Engine
FIFO, Flow Control, VLAN Tagging, Priority
10/100
MAC 2
10/100
MAC 3
10/100
MAC 4
10/100
MAC 5
SNI
Queue
Mgmnt
Buffer
Mgmnt
Frame
Buffers
LED I/F
Control
Registers
EEPROM
I/F
KS8995XA
Micrel, Inc. 鈥?2180 Fortune Drive 鈥?San Jose, CA 95131 鈥?USA 鈥?tel + 1 (408) 944-0800 鈥?fax + 1 (408) 474-1000 鈥?http://www.micrel.com
May 2005
1
M9999-051305

KSZ8995XA 產(chǎn)品屬性

  • 66

  • 集成電路 (IC)

  • 專用 IC

  • *

  • *

  • *

  • 表面貼裝

  • 128-BFQFP

  • 128-PQFP（14x20）

  • 托盤

  • 576-1642-ND - BOARD EVALUATION FOR KSZ8995XA

  • 576-1042

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