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KSZ8995M Datasheet

  • KSZ8995M

  • Integrated 5-Port 10/100 Managed Switch

  • 73頁

  • MICREL   MICREL

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KS8995M
Micrel
KS8995M
Integrated 5-Port 10/100 Managed Switch
Rev 1.12
General Description
The KS8995M is a highly integrated Layer-2 managed switch
with optimized BOM (Bill of Materials) cost for low port count,
cost-sensitive 10/100Mbps switch systems. It also provides
an extensive feature set such as tag/port-based VLAN, QoS
(Quality of Service) priority, management, MIB counters, dual
MII interfaces and CPU control/data interfaces to effectively
address both current and emerging Fast Ethernet applica-
tions.
The KS8995M contains five 10/100 transceivers with pat-
ented mixed-signal low-power technology, five MAC (Media
Access Control) units, a high-speed non-blocking switch
fabric, a dedicated address look-up engine, and an on-chip
frame buffer memory.
All PHY units support 10BaseT and 100BaseTX. In addition,
two of the PHY units support 100BaseFX (Ports 4 and 5).
All support documentation can be found on Micrel鈥檚 web site
at www.micrel.com.
Features
鈥?Integrated switch with five MACs and five Fast Ethernet
transceivers fully compliant to IEEE 802.3u standard
鈥?Shared memory based switch fabric with fully non-
blocking configuration
鈥?1.4Gbps high-performance memory bandwidth
鈥?10BaseT, 100BaseTX and 100BaseFX modes (FX in
Ports 4 and 5)
鈥?Dual MII configuration: MII-Switch (MAC or PHY mode
MII) and MII-P5 (PHY mode MII)
鈥?IEEE 802.1q tag-based VLAN (16 VLANs, full-range
VID) for DMZ port, WAN/LAN separation or inter-VLAN
switch links
鈥?VLAN ID tag/untag options, per-port basis
鈥?Programmable rate limiting 0Mbps to 100Mbps, ingress
and egress port, rate options for high and low priority,
per-port-basis
鈥?Flow control or drop packet rate limiting (ingress port)
鈥?Integrated MIB counters for fully compliant statistics
gathering, 34 MIB counters per port
Functional Diagram
Auto
MDI/MDIX
Auto
MDI/MDIX
Auto
MDI/MDIX
Auto
MDI/MDIX
Auto
MDI/MDIX
MII-P5
MDC, MDI/O
MII-SW or SNI
Control Reg I/F
LED0[5:1]
LED1[5:1]
LED2[5:1]
10/100
T/Tx 1
10/100
T/Tx 2
10/100
T/Tx 3
10/100
T/Tx/Fx 4
10/100
T/Tx/Fx 5
10/100
MAC 1
10/100
MAC 2
10/100
MAC 3
10/100
MAC 4
10/100
MAC 5
SNI
SPI
FIFO, Flow Control, VLAN Tagging, Priority
1K look-up
Engine
Queue
Mgmnt
Buffer
Mgmnt
Frame
Buffers
MIB
Counters
EEPROM
I/F
LED I/F
Control
Registers
KS8995M
Micrel, Inc. 鈥?1849 Fortune Drive 鈥?San Jose, CA 95131 鈥?USA 鈥?tel + 1 (408) 944-0800 鈥?fax + 1 (408) 944-0970 鈥?http://www.micrel.com
December 2003
1
M9999-120403

KSZ8995M 產(chǎn)品屬性

  • 66

  • 集成電路 (IC)

  • 專用 IC

  • *

  • *

  • *

  • 表面貼裝

  • 128-BFQFP

  • 128-PQFP（14x20）

  • 托盤

  • 576-1607-ND - BOARD EVAL EXPERIMENT KSZ8995MA

  • 576-1038

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