KM416C4000C, KM416C4100C
CMOS DRAM
4M x 16bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
This is a family of 4,194,304 x 16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory
cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time ( -5 or -6) are optional features of this family. All of this family
have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. This 4Mx16 Fast Page Mode DRAM family is fabri-
cated using Samsung鈥瞫 advanced CMOS process to realize high band-width, low power consumption and high reliability.
FEATURES
鈥?Part Identification
- KM416C4000C(5.0V, 8K Ref.)
- KM416C4100C(5.0V, 4K Ref.)
鈥?/div>
Active Power Dissipation
Unit : mW
Speed
-5
-6
8K
495
440
4K
660
605
鈥?Fast Page Mode operation
鈥?2CAS Byte/Word Read/Write operation
鈥?CAS-before-RAS refresh capability
鈥?RAS-only and Hidden refresh capability
鈥?Fast parallel test mode capability
鈥?TTL(5.0V) compatible inputs and outputs
鈥?Early Write or output enable controlled write
鈥?JEDEC Standard pinout
鈥?Available in Plastic TSOP(II) package
鈥?+5.0V鹵10% power supply
鈥?/div>
Refresh Cycles
Part
NO.
KM416C4000C*
KM416C4100C
Refresh
cycle
8K
4K
Refresh time
Normal
64ms
RAS
UCAS
LCAS
W
Control
Clocks
Vcc
Vss
Lower
Data in
Buffer
Sense Amps & I/O
Lower
Data out
Buffer
Upper
Data in
Buffer
Upper
Data out
Buffer
FUNCTIONAL BLOCK DIAGRAM
VBB Generator
* Access mode & RAS only refresh mode
: 8K cycle/64ms
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms
Refresh Timer
Refresh Control
Row Decoder
DQ0
to
DQ7
鈥?/div>
Performance Range
Speed
-5
-6
Refresh Counter
Memory Array
4,194,304 x 16
Cells
OE
DQ8
to
DQ15
t
RAC
50ns
60ns
t
CAC
13ns
15ns
t
RC
90ns
110ns
t
PC
35ns
40ns
A0~A12
(A0~A11)*1
A0~A8
(A0~A9)*1
Row Address Buffer
Col. Address Buffer
Column Decoder
Note) *1 : 4K Refresh
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
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