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KM416C254D Datasheet

  • KM416C254D

  • 256K x 16Bit CMOS Dynamic RAM with Extended Data Out

  • 36頁(yè)

  • SAMSUNG   SAMSUNG

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KM416C254D, KM416V254D
CMOS DRAM
256K x 16Bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
This is a family of 262,144 x 16 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random access
of memory cells within the same row. Power supply voltage(+5.0V or +3.3V), Access time (-5,-6 or -7), power consumption(Normal or
Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-
only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 256Kx16 EDO Mode
DRAM family is fabricated using Samsung鈥瞫 advanced CMOS process to realize high band-width, low power consumption and high reli-
ability. It may be used as graphic memory unit for microcomputer, personal computer and portable machines.
鈥?Extended Data Out Mode operation
FEATURES
鈥?Part Identification
- KM416C254D/DL (5V, 512 Ref.)
- KM416V254D/DL (3.3V, 512 Ref.)
鈥?2 CAS Byte/Wrod Read/Write operation
鈥?CAS-before-RAS refresh capability
鈥?RAS-only and Hidden refresh capability
鈥?Self-refresh capability (L-ver only)
鈥?TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
鈥?Early Write or output enable controlled write
鈥?JEDEC Standard pinout
鈥?Available in 40-pin SOJ 400mil and 44(40)-pin
packages
鈥?Triple +5V鹵10% power supply (5V product)
鈥?Triple +3.3V鹵0.3V power supply (3.3V product)
鈥?/div>
Active Power Dissipation
Speed
-5
-6
-7
鈥?/div>
Refresh Cycles
Part
NO.
C254D
V254D
V
CC
5V
3.3V
Refresh
cycle
512
3.3V(512 Ref.)
-
255
235
Unit : mW
5V(512 Ref.)
605
495
440
FUNCTIONAL BLOCK DIAGRAM
Refresh period
Normal
8ms
L-ver
128ms
RAS
UCAS
LCAS
W
Control
Clocks
VBB Generator
Vcc
Vss
Lower
Data in
Buffer
Sense Amps & I/O
Lower
Data out
Buffer
Upper
Data in
Buffer
Upper
Data out
Buffer
Refresh Timer
Row Decoder
鈥?/div>
Performance Range
Refresh Control
DQ0
to
DQ7
Speed
-5
-6
-7
t
RAC
50ns
60ns
70ns
t
CAC
15ns
15ns
20ns
t
RC
84ns
104ns
124ns
t
HPC
20ns
25ns
30ns
Remark
5V only
5V/3.3V
5V/3.3V
A0~A8
Col. Address Buffer
Refresh Counter
Row Address Buffer
Memory Array
262,144 x16
Cells
OE
Column Decoder
DQ8
to
DQ15
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.

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