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KM416C1200B Datasheet

  • KM416C1200B

  • 1M x 16Bit CMOS Dynamic RAM with Fast Page Mode

  • 87.83KB

  • 8頁

  • SAMSUNG   SAMSUNG

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KM416C1000B, KM416C1200B
KM416V1000B, KM416V1200B
1M x 16Bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
CMOS DRAM
This is a family of 1,048,576 x 16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory
cells within the same row. Power supply voltage (+5.0V or +3.3V), refresh cycle (1K Ref. or 4K Ref.), access time (-5,-6 or -7), power
consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-
before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This
1Mx16 Fast Page Mode DRAM family is fabricated using Samsung's advanced CMOS process to realize high band-width, low power
consumption and high reliability. It may be used as graphic memory unit for microcomputer, personal computer and portable machines.
FEATURES
隆脺
隆脺
Fast Page Mode operation
2 CAS Byte/Word Read/Write operation
CAS-before-RAS refresh capability
RAS-only and Hidden refresh capability
Self-refresh capability (L-ver only)
TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
Early Write or output enable controlled write
JEDEC Standard pinout
Available in 42-pin SOJ 400mil and 50(44)-pin TSOP(II)
400mil packages
Single +5V
隆戮
10% power supply (5V product)
Single +3.3V
隆戮
0.3V power supply (3.3V product)
Part Identification
- KM416C1000B/B-L (5V, 4K Ref.)
- KM416C1200B/B-L (5V, 1K Ref.)
- KM416V1000B/B-L (3.3V, 4K Ref.)
- KM416V1200B/B-L (3.3V, 1K Ref.)
隆脺
隆脺
隆脺
隆脺
隆脺
隆脺
隆脺
Active Power Dissipation
隆脺
Unit : mW
隆脺
Speed
4K
-5
-6
-7
396
360
324
3.3V
1K
576
540
504
4K
605
550
495
5V
1K
隆脺
880
隆脺
825
770
FUNCTIONAL BLOCK DIAGRAM
隆脺
Refresh Cycles
Part
NO.
C1000B
V1000B
C1200B
V1200B
V
CC
5V
3.3V
5V
3.3V
1K
16ms
Refresh Control
Refresh Counter
Memory Array
1,048,576 x16
Cells
Refresh
cycle
4K
Refresh period
Normal
64ms
128ms
L-ver
RAS
UCAS
LCAS
W
Control
Clocks
VBB Generator
Vcc
Vss
Lower
Data in
Buffer
Sense Amps & I/O
Lower
Data out
Buffer
Upper
Data in
Buffer
Upper
Data out
Buffer
Refresh Timer
Row Decoder
DQ0
to
DQ7
OE
DQ8
to
DQ15
隆脺
Perfomance Range
Speed
-5
-6
-7
t
RAC
50ns
60ns
70ns
t
CAC
15ns
15ns
20ns
t
RC
90ns
110ns
130ns
t
PC
35ns
40ns
45ns
Remark
5V/3.3V
5V/3.3V
5V/3.3V
A0-A11
(A0 - A9)
*1
A0 - A7
(A0 - A9)
*1
Row Address Buffer
Col. Address Buffer
Column Decoder
Note)
*1
: 1K Refresh
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.

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