TECHNICAL DATA
KKA8362ANS
Integrated PAL and PAL/NTSC TV processor
GENERAL DESCRIPTION
The
KKA8362ANS
is designed to be used in a multi-standard TV receiver and contains functional units for processing
signals of intermediate frequency of audio and sound, vertical scanning and line synchronisation of colour signal in
PAL/NTSC and RGB output signal.
The
KKA8362ANS
is pin to pin compatible with TDA8362A, Philips and nearly identical to the TDA8362. The main
difference between
KKA8362ANS
and TDA8362 is that
KKA8362ANS
contain a black-current stabilisation circuit.
Because of the required input pin for the black-current stabilisation circuit the luminance peaking function has been
omitted in the
KKA8362ANS.
All other function of the 2 IC's are identical. The pinning of the 2 IC's is slightly different,
because the
KKA8362ANS
have a ground connection on each side. This adoption of the pinning has positive effects on
the application of the IC.
The
KKA8362ANS
is single-chip TV processors which contain nearly all small signal functions that are required for a
colour television receiver. For a complete receiver the following circuits need to be added: a tuner, a SECAM decoder a
base-band delay line (KKA4661) and output stages for audio, video and horizontal and vertical deflection.
FEATURES
鈥?/div>
Multistandard vision IF circuit (positive and negative modulation)
鈥?/div>
Multistandard FM sound demodulator (4.5 Mhz to 6.5 Mhz)
鈥?/div>
Source selection for external A/V inputs (separate Y/C signals can also be applied)
鈥?/div>
Integrated chrominance trap and bandpass filters (automatically calibrated)
鈥?/div>
Integrated luminance delay line
鈥?/div>
PAL/NTSC colour decoder with automatic search system
鈥?/div>
Easy interfacing with the
KKA8395
(SECAM decoder) for multistandard applications.
鈥?/div>
RGB control circuit with linear RGB inputs and fast blanking
鈥?/div>
Input for automatic cut-off control with compensation for leakage current of the picture tube.
鈥?/div>
Horizontal synchronisation with two control loops and alignment-free horizontal oscillator without external
components
鈥?/div>
Vertical count-down circuit (50/60 Hz) and vertical preamplifier
鈥?/div>
Low dissipation (700 mW)
鈥?/div>
Small amount of peripheral components compared with competition ICs
鈥?/div>
Only one adjustment (vision IF demodulator)
鈥?/div>
The ICs are mounted in a shrink DIL package with 52 pins
1
next
KKA8362ANS相關(guān)型號PDF文件下載
-
型號
版本
描述
廠商
下載
-
英文版
DUAL 5.1V REGULATOR WITH DISABLE AND RESET
KODENSHI
-
英文版
DUAL 5.1V REGULATOR WITH DISABLE AND RESET
KODENSHI [...
-
英文版
DC-COUPLED VERTICAL DEFLECTION CIRCUIT
KODENSHI
-
英文版
DC-COUPLED VERTICAL DEFLECTION CIRCUIT
KODENSHI [...
-
英文版
DC-coupled vertical deflection circuit
KODENSHI
-
英文版
DC-coupled vertical deflection circuit
KODENSHI [...
-
英文版
I2C BUS CONTROLLED SINGLE CHIP TV-RECEIVER
KODENSHI
-
英文版
I2C BUS CONTROLLED SINGLE CHIP TV-RECEIVER
KODENSHI [...
-
英文版
DUAL +5.1V +8V REGULATOR WITH DISABLE AND RESET
KODENSHI
-
英文版
DUAL +5.1V +8V REGULATOR WITH DISABLE AND RESET
KODENSHI [...
-
英文版
DUAL 5.1V REGULATOR WITH DISABLE AND RESET
KODENSHI
-
英文版
DUAL 5.1V REGULATOR WITH DISABLE AND RESET
KODENSHI [...
-
英文版
5.1V +12V REGULATOR WITH DISABLE AND RESET
KODENSHI
-
英文版
5.1V +12V REGULATOR WITH DISABLE AND RESET
KODENSHI [...
-
英文版
SECAM decoder
KODENSHI
-
英文版
SECAM decoder
KODENSHI [...
-
英文版
CMOS timer with RAM and I2C-bus control.
KODENSHI
-
英文版
CMOS timer with RAM and I2C-bus control.
KODENSHI [...
-
英文版
Z8-BIT MICROCONTROLLERS WITH OCD AND VST
KODENSHI
-
英文版
Z8-BIT MICROCONTROLLERS WITH OCD AND VST
KODENSHI [...