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KK74HCT138AD Datasheet

  • KK74HCT138AD

  • KODENSHI KOREA CORP. [1-of-8 Decoder/Demultiplexer High-Per...

  • KODENSHI

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TECHNICAL DATA
KK74HCT138A
1-of-8 Decoder/Demultiplexer
High-Performance Silicon-Gate CMOS
The KK74HCT138A is identical in pinout to the LS/ALS138. The
KK74HCT138A may be used as a level converter for interfacing TTL or
NMOS outputs to High Speed CMOS inputs.
The KK74HCT138A decodes a three-bit Address to one-of-eight
active-lot outputs. This device features three Chip Select inputs, two
active-low and one active-high to facilitate the demultiplexing, cascading,
and chip-selecting functions. The demultiplexing function is
accomplished by using the Address inputs to select the desired device
output; one of the Chip Selects is used as a data input while the other
Chip Selects are held in their active states.
鈥?/div>
TTL/NMOS Compatible Input Levels
鈥?/div>
Outputs Directly Interface to CMOS, NMOS, and TTL
鈥?/div>
Operating Voltage Range: 4.5 to 5.5 V
鈥?/div>
Low Input Current: 1.0
碌A(chǔ)
ORDERING INFORMATION
KK74HCT138AN Plastic
KK74HCT138AD SOIC
T
A
= -55擄 to 125擄 C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
CS1 CS2 CS3
X X H
X H X
L X X
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
A2 A1 A0
X X X
X X X
X X X
L
L
L
L
H
H
H
H
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
Outputs
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
H H H H H H H H
H H H H H H H H
H H H H H H H H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
PIN 16 =V
CC
PIN 8 = GND
H = high level (steady state)
L = low level (steady state)
X = don鈥檛 care
1

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