TECHNICAL DATA
KK74HC4094A
8-Bit Serial-Input Shift Register
With Latched 3-State Outputs
High-Performance Silicon-Gate CMOS
The KK74HC4094A is identical in pinout to the LS/ALS4094. The
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
This device consists of an 8-bit shift register and 8-bit D-type latch
with three-state parallel outputs. Data is shifted serially through the shift
register on the positive going transition of the clock input signal. The
output of the last stage SQ
H
can be used to cascade several devices.
Data on the SQ
H
output is transferred to a second output (SQ
H
鈥? on the
following negative transition of the clock input signal. The data of each
stage of the shift register is provided with a latch, which latches data on
the negative going transition of the Strobe input signal. When the Strobe
input is held high, data propagates through the latch to a 3-state output
buffer.
This buffer is enabled when Output Enable input is taken high.
鈥?/div>
Outputs Directly Interface to CMOS, NMOS, and TTL
鈥?/div>
Operating Voltage Range: 2.0 to 6.0 V
鈥?/div>
Low Input Current: 1.0
碌A
鈥?/div>
High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
KK74HC4094AN Plastic
KK74HC4094AD SOIC
T
A
= -55擄 to 125擄 C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Clock Output
Enable
PIN 16 =V
CC
PIN 8 = GND
L
L
H
H
H
Strobe A
X
X
L
H
H
X
X
L
H
Parallel
Outputs
Q
A
Z
Z
L
H
Q
N
Z
Z
NC
Q
N-1
Q
N-1
NC
Serial
Outputs
SQ
H
SQ
H
鈥?/div>
Q6 NC
NC SQ
H
Q6 NC
Q6 NC
Q6 NC
NC SQ
H
X NC
H
X
NC = No Change
Z = high impedance
X = don鈥檛 care
X NC
1
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