TECHNICAL DATA
KK74HC123A
Dual Retriggerable Monostable
Multivibrator
The KK74HC123A is identical in pinout to the LS/ALS123. The
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
There are two trigger inputs, A INPUT (negative edge) and
B INPUT (positive edge). These inputs are valid for rising/falling signals.
The device may also be triggered by using the CLR input (positive-
edge) because of the Schmitt-trigger input; after triggering the output
maintains the MONOSTABLE state for the time period determined by the
external resistor R
X
and capacitor C
X
. Taking CLR low breaks this
MONOSTABLE STATE. If the next trigger pulse occurs during the
MONOSTABLE period it makes the MONOSTABLE period longer.
鈥?/div>
Outputs Directly Interface to CMOS, NMOS, and TTL
鈥?/div>
Operating Voltage Range: 3.0 to 6.0 V
鈥?/div>
Low Input Current: 1.0
碌A
鈥?/div>
High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
KK74HC123AN Plastic
KK74HC123AD SOIC
T
A
= -55擄 to 125擄 C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
PIN 16 =V
CC
PIN 8 = GND
Note
(1) C
X
, R
X
, D
X
are external components.
(2) D
X
is a clamping diode.
The external capacitor is charged to V
CC
in the stand-by
state, i.e. no trigger. When the supply voltage is turned off
C
X
is discharged mainly through an internal parasitic diode.
If C
X
is sufficiently large and V
CC
decreases rapidy, there
will be some possibility of damaging the I.C. with a surge
current or latch-up. If the voltage supply filter capacitor is
large enough and V
CC
decrease slowly, the surge current is
automatically limited and damage the I.C. is avoided. The
maximum forward current of the parasitic diode is
approximately 20 mA.
A
Inputs
B
H
X
H
L
L
X
H
X
L
L
H
L
X
CLR
H
H
H
H
L
*
L
*
H
*
H
*
Outputs
Q
Q
Output
Enable
Inhibit
Inhibit
Output
Enable
Output
Enable
Inhibit
Note
X = don鈥檛 care
*
- except for monostable period
1
1
2
3
4
5
6
7
