TECHNICAL DATA
KK4052B
Analog Multiplexer Demultiplexer
High-Performance Silicon-Gate CMOS
The
KK4052B
analog multiplexer/demultiplexer is digitally controlled
analog switches having low ON impedance and very low OFF leakage
current. Control of analog signals up to 20V peak-to-peak can be
achieved by digital signal amplitudes of 4.5 to 20V (if V
CC
- GND = 3V,
a V
CC
- V
EE
of up to 13 V can be controlled; for V
CC
- V
EE
level
differences above 13V a V
CC
- GND of at least 4.5V is required).
These multiplexer circuits dissipate extremely low quiescent power
over the full V
CC
-GND and V
CC
- V
EE
supply-voltage ranges,
independent of the logic state of the control signals. When a logic 鈥?鈥漣s
present at the ENABLE input terminal all channels are off.
The IW4052 is a differential 4-channel multiplexer having two binary
control inputs. A and B, and an enable input. The two binary input signals
select 1 of 4 pairs of channels to turned on and connect the analog inputs
to the outputs.
鈥?/div>
Operating Voltage Range: 3.0 to 18 V
鈥?/div>
Maximum input current of 1碌A at 18 V over full package-temperature
鈥?/div>
range; 100 nA at 18 V and 25擄C
鈥?/div>
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
N SUFFIX
PLASTIC
16
1
16
1
D SUFFIX
SOIC
ORDERING INFORMATION
KK4052BN
Plastic DIP
KK4052BD
SOIC
T
A
= -55擄 to 125擄 C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
Double-Pole, 4-Position
Plus Common Off
FUNCTION TABLE
Control Inputs
Enable
B
L
L
L
L
PIN 16 =V
CC
PIN 7 = V
EE
PIN 8 = GND
L
L
H
H
Select
A
L
H
L
H
X
Y0
Y1
Y2
Y3
X0
X1
X2
X3
None
ON
Channels
H
X
H = high level
L = low level
X = don鈥檛 care
1
1
2
3
4
5
6
7
