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K7R161882B Datasheet

  • K7R161882B

  • 512Kx36 & 1Mx18 & 2Mx9 QDRTM II b2 SRAM

  • 19頁

  • SAMSUNG   SAMSUNG

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K7R163682B
K7R161882B
K7R160982B
Document Title
512Kx36 & 1Mx18 & 2Mx9 QDR
TM
II b2 SRAM
512Kx36-bit, 1Mx18-bit, 2Mx9-bit QDR
TM
II b2 SRAM
Revision History
Rev. No.
0.0
0.1
History
1. Initial document.
1. Change the Boundary scan exit order.
2. Correct the Overshoot and Undershoot timing diagram.
1. Change the JTAG Block diagram
1. Change the DC characteristics table.
1. Correct the JTAG ID register definition
2. Correct the AC timing parameter (delete the tKHKH Max value)
1. Change the Maximum Clock cycle time.
2. Correct the 165FBGA package ball size.
1. Add the power up/down sequencing comment.
2. Update the DC current parameter (Icc and Isb).
1. Update the Stand-by current(Isb)
1. Change the ISB1.
Speed Bin
-25
-20
-16
1.0
2.0
1. Final spec release
1. Delete the x8 Org.
2. Delete the 250MHz speed bin
1. Add the 250MHz speed bin
From
250
230
210
To
280
260
240
Oct. 31, 2003
Nov. 28, 2003
Final
Final
Draft Date
Oct. 17, 2002
Dec. 16, 2002
Remark
Advance
Preliminary
0.2
0.3
0.4
Dec. 26, 2002
Jan. 27, 2003
Mar. 20, 2003
Preliminary
Preliminary
Preliminary
0.5
April. 4, 2003
Preliminary
0.6
June. 20, 2003
Preliminary
0.7
0.8
June. 23, 2003
Oct. 20. 2003
Preiliminary
Preiliminary
3.0
June. 18, 2004
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
June. 2004
Rev 3.0

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