K7A403609A
K7A401809A
Document Title
128Kx36 & 256Kx18 Synchronous SRAM
128Kx36 & 256Kx18-Bit Synchronous Pipelined Burst SRAM
Revision History
Rev. No
0.0
0.1
0.2
History
Initial draft
Add tCYC 300MHz.
1. Changed DC condition at Icc and I
SB.
Icc ; from 540mA to 590mA at -30,
from 490mA to 540mA at -27,
from 440mA to 490mA at -25,
from 410mA to 460mA at -22,
from 390mA to 440mA at -20,
from 370mA to 420mA at -18,
I
SB
; from 190mA
from 180mA
from 170mA
from 160mA
from 150mA
from 140mA
1.0
to
to
to
to
to
to
200mA at -30,
190mA at -27,
180mA at -25,
170mA at -22,
160mA at -20,
150mA at -18,
May. 15. 2000
Final
Draft Date
Jan. 22. 2000
Feb. 10. 2000
April. 03. 2000
Remark
Preliminary
Preliminary
Preliminary
1. Final spec release
2. Changed input & output capacitance.
C
IN
; from 6pF to 5pF,
C
OUT
; from 8pF to 7pF,
3.Changed
part number
from K7A4036(18)00A -under 167MHz to K7A4036(18)09A -over183MHz
1. Changed Input setup at -275MHz and 300MHz
From 0.8ns to 0.75ns,
1. Changed Input setup at -300MHz
From 0.75ns to 0.6ns
2.0
August. 17. 2000
Final
3.0
August. 30. 2000
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
August 2000
Rev 3.0