K4F660811B,K4F640811B
CMOS DRAM
8M x 8bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
This is a family of 8,388,608 x 8 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells
within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -50 or -60), package type (SOJ or TSOP-II) are optional fea-
tures of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. This 8Mx8 Fast
Page Mode DRAM family is fabricated using Samsung鈥瞫 advanced CMOS process to realize high band-width, low power consumption
and high reliability.
FEATURES
鈥?Part Identification
- K4F660811B-JC(5.0V, 8K Ref.)
- K4F640811B-JC(5.0V, 4K Ref.)
- K4F660811B-TC(5.0V, 8K Ref.)
- K4F640811B-TC(5.0V, 4K Ref.)
鈥?Fast Page Mode operation
鈥?CAS-before-RAS refresh capability
鈥?RAS-only and Hidden refresh capability
鈥?Fast parallel test mode capability
鈥?TTL(5.0V) compatible inputs and outputs
鈥?Early Write or output enable controlled write
鈥?/div>
Active Power Dissipation
Unit : mW
Speed
-45
-50
-60
8K
550
495
440
4K
715
660
605
鈥?JEDEC Standard pinout
鈥?Available in Plastic SOJ and TSOP(II) packages
鈥?+5.0V鹵10% power supply
鈥?/div>
Refresh Cycles
Part
NO.
K4F660811B*
K4F640811B
Refresh
cycle
8K
4K
Refresh time
Normal
64ms
RAS
CAS
W
Control
Clocks
Vcc
Vss
FUNCTIONAL BLOCK DIAGRAM
VBB Generator
Refresh Control
Refresh Counter
Memory Array
8,388,608 x 8
Cells
Sense Amps & I/O
* Access mode & RAS only refresh mode
: 8K cycle/64ms
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms
Refresh Timer
Row Decoder
Data in
Buffer
DQ0
to
DQ7
Data out
Buffer
OE
鈥?/div>
Performance Range
Speed
-45
-50
-60
t
RAC
45ns
50ns
60ns
t
CAC
12ns
13ns
15ns
t
RC
80ns
90ns
110ns
t
PC
31ns
35ns
40ns
A0~A12
(A0~A11)*1
A0~A9
(A0~A10)*1
Row Address Buffer
Col. Address Buffer
Column Decoder
Note) *1 : 4K Refresh
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
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