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Package
-. K3P6C2000B-SC : 70-SSOP-500
CMOS MASK ROM
GENERAL DESCRIPTION
The K3P6C2000B-SC is a fully static mask programmable
ROM fabricated using silicon gate CMOS process technology,
and is organized either as 2,097,152x16 bit(word mode) or as
1,048,576x32 bit(double word mode) depending on WORD
voltage level.(See mode selection table)
This device includes page read mode function, page read mode
allows 4 double words(or 8 words) of data to read fast in the
same page, CE and A
2
~ A
19
should not be changed.
This device operates with a 5V single power supply, and all
inputs and outputs are TTL compatible.
Because of its asynchronous operation, it requires no external
clock assuring extremely easy operation.
It is suitable for use in program memory of microprocessor, and
data memory, character generator.
The K3P6C2000B-SC is packaged in a 70-SSOP.
FUNCTIONAL BLOCK DIAGRAM
A
19
.
.
.
.
.
.
.
.
A
2
A
0~
A
1
A
-1
X
BUFFERS
AND
DECODER
MEMORY CELL
MATRIX
(1,048,576x32/
2,097152x16)
PIN CONFIGURATION
Y
BUFFERS
AND
DECODER
SENSE AMP.
DATA OUT
BUFFERS
. . .
CE
OE
WORD
CONTROL
LOGIC
Q
0
/Q
16
Q
15
/Q
31
Pin Name
A
0
- A
1
A
2
- A
19
Q
0
- Q
30
Q
31
/A
-1
WORD
CE
OE
V
CC
V
SS
N.C
Pin Function
Page Address Inputs
Address Inputs
Data Outputs
Output 31(Double word mode)/
LSB Address(Word mode)
Double word/Word mode selection
Chip Enable
Output Enable
Power (+5V)
Ground
No Connection
A
0
A
1
A
2
A
3
A
4
A
5
V
CC
Q
0
Q
16
Q
1
Q
17
V
SS
V
CC
Q
2
Q
18
Q
3
Q
19
Q
4
Q
20
Q
5
Q
21
V
SS
V
CC
Q
6
Q
22
Q
7
Q
23
V
SS
A
6
A
7
A
8
A
9
A
10
A
11
A
12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
SSOP
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
N.C
N.C
N.C
WORD
OE
CE
V
SS
Q
31
/A
-1
Q
15
Q
30
Q
14
V
SS
V
CC
Q
29
Q
13
Q
28
Q
12
Q
27
Q
11
Q
26
Q
10
V
SS
V
CC
Q
25
Q
9
Q
24
Q
8
V
CC
A
19
A
18
A
17
A
16
A
15
A
14
A
13
K3P6C2000B-SC
1
2
3
4
