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JM38510/65352BDA Datasheet

  • JM38510/65352BDA

  • DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AN...

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  • TI

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SN54HCT74, SN74HCT74
DUAL D TYPE POSITIVE EDGE TRIGGERED FLIP FLOPS
WITH CLEAR AND PRESET
SCLS169E 鈭?DECEMBER 1982 鈭?REVISED APRIL 2004
D
D
D
D
D
D
D
Operating Voltage Range of 4.5 V to 5.5 V
Outputs Can Drive Up To 10 LSTTL Loads
Low Power Consumption, 40-碌A(chǔ) Max I
CC
Typical t
pd
= 17 ns
鹵4-mA
Output Drive at 5 V
Low Input Current of 1
碌A(chǔ)
Max
Inputs Are TTL-Voltage Compatible
SN54HCT74 . . . J OR W PACKAGE
SN74HCT74 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
description/ordering information
The 鈥橦CT74 devices contain two independent
D-type positive-edge-triggered flip-flops. A low
level at the preset (PRE) or clear (CLR) inputs sets
or resets the outputs, regardless of the levels of
the other inputs. When PRE and CLR are inactive
(high), data at the data (D) input meeting the setup
time requirements are transferred to the outputs
on the positive-going edge of the clock (CLK)
pulse. Clock triggering occurs at a voltage level
and is not directly related to the rise time of CLK.
Following the hold-time interval, data at the
D input may be changed without affecting the
levels at the outputs.
1CLR
1D
1CLK
1PRE
1Q
1Q
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
2CLR
2D
2CLK
2PRE
2Q
2Q
SN54HCT74 . . . FK PACKAGE
(TOP VIEW)
1D
1CLR
NC
V
CC
2CLR
1CLK
NC
1PRE
NC
1Q
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
2D
NC
2CLK
NC
2PRE
1Q
GND
NC
NC 鈭?No internal connection
ORDERING INFORMATION
TA
PDIP 鈭?N
PACKAGE鈥?/div>
Tube of 25
Tube of 50
SOIC 鈭?D
鈭?0 C 85擄C
鈭?0擄C to 85 C
SOP 鈭?NS
SSOP 鈭?DB
Reel of 2500
Reel of 250
Reel of 2000
Reel of 2000
Tube of 90
TSSOP 鈭?PW
CDIP 鈭?J
鈭?5 C 125擄C
鈭?5擄C to 125 C
CFP 鈭?W
LCCC 鈭?FK
Reel of 2000
Reel of 250
Tube of 25
Tube of 150
Tube of 55
ORDERABLE
PART NUMBER
SN74HCT74N
SN74HCT74D
SN74HCT74DR
SN74HCT74DT
SN74HCT74NSR
SN74HCT74DBR
SN74HCT74PW
SN74HCT74PWR
SN74HCT74PWT
SNJ54HCT74J
SNJ54HCT74W
SNJ54HCT74FK
SNJ54HCT74J
SNJ54HCT74W
SNJ54HCT74FK
HT74
HCT74
HT74
HCT74
TOP-SIDE
MARKING
SN74HCT74N
鈥?Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
Copyright
錚?/div>
2004, Texas Instruments Incorporated
鈥?/div>
DALLAS, TEXAS 75265
2Q
2Q
1

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