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JM38510/37301B2A Datasheet

  • JM38510/37301B2A

  • QUADRUPLE 2-INPUT POSITIVE-NOR GATES

  • 8頁

  • TI

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SN54ALS02A, SN54AS02, SN74ALS02A, SN74AS02
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
SDAS111B 鈥?APRIL 1982 鈥?REVISED DECEMBER 1994
鈥?/div>
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
SN54ALS02A, SN54AS02 . . . J PACKAGE
SN74ALS02A, SN74AS02 . . . D OR N PACKAGE
(TOP VIEW)
description
These devices contain four independent 2-input
positive-NOR gates. They perform the Boolean
functions Y = A + B or Y = A
鈥?/div>
B in positive logic.
The SN54ALS02A and SN54AS02 are
characterized for operation over the full military
temperature range of 鈥?55擄C to 125擄C. The
SN74ALS02A and SN74AS02 are characterized
for operation from 0擄C to 70擄C.
FUNCTION TABLE
(each gate)
INPUTS
A
H
X
L
B
X
H
L
OUTPUT
Y
L
L
H
1Y
1A
1B
2Y
2A
2B
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
4Y
4B
4A
3Y
3B
3A
SN54ALS02A, SN54AS02 . . . FK PACKAGE
(TOP VIEW)
1A
1Y
NC
V
CC
4Y
1B
NC
2Y
NC
2A
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
4B
NC
4A
NC
3Y
NC 鈥?No internal connection
logic symbol
鈥?/div>
1A
1B
2A
2B
3A
3B
4A
4B
2
3
5
6
8
9
11
12
13
4Y
10
3Y
鈮?
1
1Y
logic diagram (positive logic)
1A
1B
4
2Y
2A
2B
3A
3B
4A
4B
2
3
5
6
8
9
11
12
10
3Y
4
2Y
1
1Y
2B
GND
NC
3A
3B
13
4Y
鈥?This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
漏
1994, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1

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