鈥?/div>
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
TYPICAL MAXIMUM
CLOCK
FREQUENCY
(MHz)
50
129
TYPICAL POWER
DISSIPATION
PER FLIP-FLOP
(mW)
6
29
SN54ALS109A, SN54AS109A . . . J PACKAGE
SN74ALS109A, SN74AS109A . . . D OR N PACKAGE
(TOP VIEW)
TYPE
鈥睞LS109A
鈥睞S109A
1CLR
1J
1K
1CLK
1PRE
1Q
1Q
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
2CLR
2J
2K
2CLK
2PRE
2Q
2Q
description
These devices contain two independent J-K
positive-edge-triggered flip-flops. A low level at
the preset (PRE) or clear (CLR) inputs sets or
resets the outputs regardless of the levels of the
other inputs. When PRE and CLR are inactive
(high), data at the J and K inputs meeting the
setup-time requirements are transferred to the
outputs on the positive-going edge of the clock
(CLK) pulse. Clock triggering occurs at a voltage
level and is not directly related to the rise time of
the clock pulse. Following the hold-time interval,
data at the J and K inputs can be changed without
affecting the levels at the outputs. These versatile
flip-flops can perform as toggle flip-flops by
grounding K and tying J high. They also can
perform as D-type flip-flops if J and K are tied
together.
SN54ALS109A, SN54AS109A . . . FK PACKAGE
(TOP VIEW)
1J
1CLR
NC
V
CC
1K
1CLK
NC
1PRE
1Q
3
4
5
6
7
8
2 1 20 19
18
17
16
15
2CLR
2J
2K
NC
2CLK
2PRE
14
9 10 11 12 13
NC 鈥?No internal connection
The SN54ALS109A and SN54AS109A are characterized for operation over the full military temperature range
of 鈥?55擄C to 125擄C. The SN74ALS109A and SN74AS109A are characterized for operation from 0擄C to 70擄C.
FUNCTION TABLE
INPUTS
PRE
L
H
L
H
H
H
H
H
CLR
H
L
L
H
H
H
H
H
CLK
X
X
X
鈫?/div>
鈫?/div>
鈫?/div>
鈫?/div>
L
J
X
X
X
L
H
L
H
X
K
X
X
X
L
L
H
H
X
H
Q0
OUTPUTS
Q
H
L
H鈥?/div>
L
Toggle
Q0
Q0
L
Q0
Q
L
H
H鈥?/div>
H
鈥?The output levels in this configuration are not specified to
meet the minimum levels for VOH if the lows at PRE and
CLR are near VIL maximum. Furthermore, this
configuration is nonstable; that is, it does not persist when
either PRE or CLR returns to its inactive (high) level.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
漏
1995, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1Q
GND
NC
2Q
2Q
1
JM38510/37102B2A 產(chǎn)品屬性
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