HiPerFET
TM
Power MOSFETs
ISOPLUS247
TM
(Electrically Isolated Back Surface)
N-Channel Enhancement Mode, Low Q
g,
High dv/dt, Low t
rr
, HDMOS
TM
Family
Preliminary data sheet
IXFR 21N100Q
V
DSS
I
D25
R
DS(on)
= 1000 V
= 19 A
= 0.50
W
t
rr
攏
250 ns
Symbol
V
DSS
V
DGR
V
GS
V
GSM
I
D25
I
D(RMS)
I
DM
I
AR
E
AR
E
AS
dv/dt
P
D
T
J
T
JM
T
stg
T
L
V
ISOL
Weight
Test Conditions
T
J
= 25擄C to 150擄C
T
J
= 25擄C to 150擄C; R
GS
= 1 MW
Continuous
Transient
T
C
= 25擄C (MOSFET chip capability)
External lead (current limit)
T
C
= 25擄C, Note 1
T
C
= 25擄C
T
C
= 25擄C
T
C
= 25擄C
I
S
攏
I
DM
, di/dt
攏
100 A/ms, V
DD
攏
V
DSS
T
J
攏
150擄C, R
G
= 2
W
T
C
= 25擄C
Maximum Ratings
1000
1000
鹵20
鹵30
19
84
21
21
60
2.3
5
400
-55 ... +150
150
-55 ... +150
V
V
V
V
A
A
A
A
mJ
J
V/ns
W
擄C
擄C
擄C
擄C
V~
g
ISOPLUS 247
TM
E153432
Isolated backside*
G = Gate
S = Source
* Patent pending
D = Drain
1.6 mm (0.063 in.) from case for 10 s
50/60 Hz, RMS
t = 1 min
300
2500
5
Symbol
Test Conditions
Characteristic Values
(T
J
= 25擄C, unless otherwise specified)
min. typ. max.
1000
2.5
V
4.5 V
鹵100
nA
T
J
= 125擄C
100
mA
2 mA
0.5
W
Features
鈥?Silicon chip on Direct-Copper-Bond
substrate
- High power dissipation
- Isolated mounting surface
- 2500V electrical isolation
鈥?IXYS advanced low Q
g
process
鈥?Low gate charge and capacitances
- easier to drive
- faster switching
鈥?Low drain to tab capacitance(<30pF)
鈥?Low R
DS (on)
HDMOS
TM
process
鈥?Rugged polysilicon gate cell structure
鈥?Rated for Unclamped Inductive Load
Switching (UIS)
鈥?Fast intrinsic Rectifier
Applications
鈥?DC-DC converters
鈥?Battery chargers
鈥?Switched-mode and resonant-mode
power supplies
鈥?DC choppers
鈥?AC motor control
Advantages
鈥?Easy assembly
鈥?Space savings
鈥?High power density
98723 (05/24/00)
V
DSS
V
GS(th)
I
GSS
I
DSS
R
DS(on)
V
GS
= 0 V, I
D
= 250mA
V
DS
= V
GS
, I
D
= 8mA
V
GS
=
鹵20
V, V
DS
= 0
V
DS
= V
DSS
V
GS
= 0 V
V
GS
= 10 V, I
D
= I
T
Notes 2, 3
IXYS reserves the right to change limits, test conditions, and dimensions.
漏 2000 IXYS All rights reserved
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