廬
ISL6413
Data Sheet
October 2003
FN9129
PRELIMINARY
Triple Output Regulator with Single
Synchronous Buck and Dual LDO
The ISL6413 is a highly integrated triple output regulator
which provides a single chip solution for wireless chipset
power management. The device integrates high efficiency
synchronous buck regulator with two ultra low noise LDO
regulators. The IC accepts an input voltage range of 3.0V to
3.6V and provides three regulated output voltages: 1.8V
(PWM), 2.84V (LDO1), and another ultra-clean 2.84V
(LDO2).
The Synchronous current mode PWM regulator with
integrated N- and P-channel power MOSFET provides pre-
set 1.8V for BBP/MAC core supply. Synchronous
rectification with internal MOSFETs is used to achieve higher
efficiency and reduced number of external components.
Operating frequency is typically 750kHz allowing the use of
smaller inductor and capacitor values. The device can be
synchronized to an external clock signal in the range of
500kHz to 1MHz. The PG_PWM output indicates loss of
regulation on PWM output.
The ISL6413 also has two LDO regulators which use an
internal PMOS transistor as the pass device. LDO2 features
ultra low noise that does not typically exceed 30碌V RMS to
aid VCO stability. The EN_LDO pin controls LDO1 and
LDO2 outputs. The ISL6413 also integrates a RESET
function, which eliminates the need for additional RESET IC
required in WLAN applications. The IC asserts a RESET
signal whenever the V
IN
supply voltage drops below a preset
threshold, keeping it asserted for at least 25ms after V
IN
has
risen above the reset threshold. The PG_LDO output
indicates loss of regulation on either of the two LDO outputs.
Other features include over current protection for all three
outputs and thermal shutdown.
High integration and the thin Quad Flat No-lead (QFN)
package makes ISL6413 an ideal choice to power many of
today鈥檚 small form factor industry standard wireless cards
such as PCMCIA, mini-PCI and Cardbus-32.
Features
鈥?Fully Integrated Synchronous Buck Regulator + Dual LDO
鈥?High Output Current (For QFN package)
- PWM, 1.8V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400mA
- LDO1, 2.84V. . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mA
- LDO2, 2.84V. . . . . . . . . . . . . . . . . . . . . . . . . . . . 200mA
鈥?Ultra-Compact DC-DC Converter Design
鈥?Stable with Small Ceramic Output Capacitors
鈥?High conversion efficiency
鈥?Low Shutdown supply current
鈥?Ultra-Low Dropout Voltage for LDOs
- LDO1, 2.84V. . . . . . . . . . . . . . . 125mV (typ.) at 300mA
- LDO2, 2.84V. . . . . . . . . . . . . . . 100mV (typ.) at 200mA
鈥?Ultra-Low Output Voltage Noise
- <30碌V
RMS
(typ.) for LDO2 (VCO Supply)
鈥?PG_LDO, PG_PWM and PG_PWM outputs
鈥?Extensive circuit protection and monitoring features
- Over voltage protection
- Over current protection
- Shutdown
- Thermal Shutdown
鈥?Integrated RESET output for microprocessor reset
鈥?Proven Reference Design for Total WLAN System
Solution
鈥?QFN Package
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Product Outline
- Near Chip-Scale Package Footprint Improves PCB
Efficiency and Is Thinner in Profile
Applications
鈥?WLAN Cards
- PCMCIA, Cardbus32, MiniPCI Cards
- Compact Flash Cards
鈥?Liberty Chipset
鈥?Hand-Held Instruments
Ordering Information
PART NUMBER TEMP. RANGE (
o
C) PACKAGE PKG. DWG. #
ISL6413IR
-40 to 85
24 Ld QFN L24.4x4B
Related Literature
鈥?TB363 - Guidelines for Handling and Processing Moisture
Sensitive Surface Mount Devices (SMDs)
鈥?TB389 - PCB Land Pattern Design and Surface Mount
Guidelines for QFN Packages
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright 漏 Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
INTERSIL
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