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廬

ISL6244

Data Sheet

December 28, 2004

FN9106.3

Multi-Phase PWM Controller

The ISL6244 provides core-voltage regulation by driving 2 to

4 interleaved synchronous-rectified buck-converter channels

in parallel. Interleaving the channel timing results in

increased ripple frequency which reduces input and output

ripple currents. The reduction in ripple results in lower

component cost, reduced dissipation, and a smaller

implementation area.

The ISL6244 uses cost and space-saving r

DS(ON)

sensing

for channel current balance, active voltage positioning, and

over-current protection. Output voltage is monitored by an

internal differential remote sense amplifier. A high-bandwidth

error amplifier drives the output voltage to match the

programmed 5-bit DAC reference voltage. The resulting

compensation signal guides the creation of pulse width

modulated (PWM) signals to control companion Intersil

MOSFET drivers. The OFS pin allows direct offset of the

DAC voltage from 0V to 100mV using a single external

resistor. The entire system is trimmed to ensure a system

accuracy of 鹵 1%.

Outstanding features of this controller IC include

Dynamic VID

TM

technology allowing seamless on-the-fly VID

changing without the need of any external components.

Battery 鈥渇eed-forward鈥?is provided to allow for traditional

control schemes over total input voltage variation. Output

voltage 鈥渄roop鈥?or active voltage positioning is optional.

When employed, it allows the reduction in size and cost of

the output capacitors required to support load transients. A

threshold-sensitive enable input allows the use of an

external resistor divider for start-up coordination with Intersil

MOSFET drivers or any other devices powered from a

separate supply.

Superior over-voltage protection is achieved by gating on the

lower MOSFET of all phases to reduce the output voltage.

Under-voltage conditions are detected, but PWM operation

is not disrupted. Over-current conditions cause a hiccup-

mode response as the controller repeatedly tries to restart.

After a set number of failed startup attempts, the controller

latches off. A power good logic signal indicates when the

converter output is between the UV and OV thresholds.

Features

鈥?Multi-Phase Power Conversion

- 2, 3 or 4 Phase Operation

鈥?Active Channel Current Balancing

鈥?Precision r

DS(ON)

Current Sharing

- Lossless

- Low Cost

鈥?Precision CORE Voltage Regulation

- Differential Remote Output Voltage Sensing

- Programmable Reference Offset

- 鹵1% System Accuracy

鈥?Microprocessor Voltage Identification Input

- 5-Bit VID Input

- 0.800V to 1.550V in 25mV Steps

- Dynamic VID Technology

鈥?Programmable Droop Voltage

鈥?Excellent Dynamic Response

- Combined Input Voltage Feed-Forward and Pulse-by-

Pulse Average Current Mode

鈥?Over Current Protection

鈥?Digital Soft Start

鈥?Threshold Sensitive Enable Input

鈥?High Ripple Frequency (160kHz to 4MHz)

鈥?QFN Package:

- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat

No Leads - Package Outline

- Near Chip Scale Package footprint, which improves PCB

efficiency and has a thinner profile

鈥?Pb-Free Available (RoHS Compliant)

Applications

鈥?AMD Hammer Family Processor Voltage Regulator

鈥?Low Output Voltage, High Current DC-DC Converters

鈥?Voltage Regulator Modules

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

|

Intersil (and design) is a registered trademark of Intersil Americas Inc.

Copyright 漏 Intersil Americas Inc. 2004 All Rights Reserved. Dynamic VID鈩?is a trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

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