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IS65C256 Datasheet

  • IS65C256

  • 32K x 8 LOW POWER CMOS STATIC RAM

  • 11頁(yè)

  • ETC

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IS65C256
32K x 8 LOW POWER CMOS
STATIC RAM
FEATURES
鈥?High-speed access time: 20 ns
鈥?/div>
Low active power: 200 mW (typical)
鈥?/div>
Low standby power:
250 碌W (typical) CMOS standby
鈥?Fully static operation: no clock or refresh
required
鈥?TTL compatible inputs and outputs
鈥?Single 5V power supply
鈥?Temperature Offerings:
Option A1: 鈥?0
o
C to +85
o
C
Option A2: 鈥?0
o
C to +105
o
C
Option A3: 鈥?0
o
C to +125
o
C
ISSI
MARCH 2004
廬
DESCRIPTION
The
ISSI
IS65C256 is a low power, 32,768 word by 8-bit
CMOS static RAM. It is fabricated using
ISSI's
high-
performance, low power CMOS technology.
When CS is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down to 250 碌W (typical) at CMOS input levels.
Easy memory expansion is provided by using an active
LOW Chip Select (CS) input and an active LOW Output
Enable (OE) input. The active LOW Write Enable (WE)
controls both writing and reading of the memory.
The IS65C256 is Packaged in the JEDEC Standard 28-Pin
SOP and 28-Pin TSOP (Type I).
FUNCTIONAL BLOCK DIAGRAM
A0-A14
DECODER
32K X 8
MEMORY ARRAY
V
DD
GND
I/O
DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
CS
OE
WE
CONTROL
CIRCUIT
Copyright 漏 2004 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
Integrated Silicon Solution, Inc. 鈥?www.issi.com 鈥?/div>
1-800-379-4774
Rev. A
03/24/04
1

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