PD-91799A
IRG4CH40SB
IRG4CH40SB IGBT Die in Wafer Form
C
G
E
1200 V
Size 4
Standard Speed
6" Wafer
Electrical Characteristics ( Wafer Form )
Parameter
V
CE (on)
V
(BR)CES
V
GE(th)
I
CES
I
GES
Description
Collector-to-Emitter Saturation Voltage
Colletor-to-Emitter Breakdown Voltage
Gate Threshold Voltage
Zero Gate Voltage Collector Current
Gate-to-Emitter Leakage Current
Guaranteed (Min/Max)
Test Conditions
4.5V Max.
I
C
= 10A, T
J
= 25擄C, V
GE
= 15V
1200V Min.
T
J
= 25擄C, I
CES
= 250碌A(chǔ), V
GE
= 0V
3.0V Min., 6.0V Max.
V
GE
= V
CE
, T
J
=25擄C, I
C
=250碌A(chǔ)
300 碌A(chǔ) Max.
T
J
= 25擄C, V
CE
= 1200V
鹵
11 碌A(chǔ) Max.
T
J
= 25擄C, V
GE
= +/- 20V
Cr-NiV-Ag ( 1kA-2kA-2.5kA )
99% Al, 1% Si (4 microns)
0.170" x 0.243"
150mm, with std. < 100 > flat
.015" + / -.003"
01-5242
100 Microns
0.25mm Diameter Minimum
Consistent throughout same wafer lot
Store in original container, in dessicated
nitrogen, with no contamination
For optimum electrical results, die attach
temperature should not exceed 300C
Mechanical Data
Nominal Backmetal Composition, Thickness:
Nominal Front Metal Composition, Thickness:
Dimensions:
Wafer Diameter:
Wafer thickness:
Relevant Die Mechanical Dwg. Number
Minimum Street Width
Reject Ink Dot Size
Ink Dot Location
Recommended Storage Environment:
Recommended Die Attach Conditions
Reference Standard IR packaged part ( for design ) : IRG4PH40S
Die Outline
NOTES:
1. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS (INCHES)
2. CONTROLLING DIMENSION: (INCH).
3. LETTER DESIGNATION:
S = SOURCE
SK = SOURCE KELVIN
G = GATE
IS = CURRENT SENSE
4. DIMENSIONAL TOLERANCES:
BONDING PADS: < 0.635 TOLERANCE = +/- 0.013
WIDTH
< (.0250) TOLERANCE = +/- (.0005)
&
< 0.635 TOLERANCE = +/- 0.025
LENGTH
< (.0250) TOLERANCE = +/- (.0010)
OVERALL DIE:
< 1.270 TOLERANCE = +/- 0.102
WIDTH
< (.050) TOLERANCE = +/- (.004)
&
< 0.635 TOLERANCE = +/- 0.203
LENGTH
< (.050) TOLERANCE = +/- (.008)
5. UNLESS OTHERWISE NOTED ALL DIE ARE GEN III
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