typ.
0.15鈩?/div>
31A
l
ZVS and High Frequency Circuit
l
PWM Inverters
Benefits
l
Low Gate Charge Qg results in Simple Drive Requirement
l
Improved Gate, Avalanche and Dynamic dv/dt Ruggedness
l
Fully Characterized Capacitance and Avalanche Voltage
and Current
l
Low Trr and Soft Diode Recovery
TO-247AC
l
High Performance Optimised Anti-parallel Diode
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25擄C
I
D
@ T
C
= 100擄C
I
DM
P
D
@T
C
= 25擄C
V
GS
dv/dt
T
J
T
STG
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
聛
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
聝
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case )
Mounting torqe, 6-32 or M3 screw
Max.
31
20
124
460
3.7
鹵 30
19
-55 to + 150
300
10 lbf鈥n (1.1N鈥)
Units
A
W
W/擄C
V
V/ns
擄C
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
聛
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
鈥撯€撯€?鈥撯€撯€?31
MOSFET symbol
showing the
A
G
鈥撯€撯€?鈥撯€撯€?124
integral reverse
S
p-n junction diode.
鈥撯€撯€?鈥撯€撯€?1.5
V
T
J
= 25擄C, I
S
= 31A, V
GS
= 0V
聞
鈥撯€撯€?170 250
T
J
= 25擄C
I
F
= 31A
ns
鈥撯€撯€?220 330
T
J
= 125擄C
di/dt = 100A/碌s
聞
鈥撯€撯€?570 860
nC
T
J
= 25擄C
鈥撯€撯€?1.2 1.8
碌C T
J
= 125擄C
鈥撯€撯€?7.9
12
A
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Typical SMPS Topologies
l
Bridge Converters
l
All Zero Voltage Switching
www.irf.com
1
05/23/01