IRF6712SPbF
IRF6712STRPbF
l
l
l
l
l
l
l
l
l
l
PD - 97273E
RoHS Compliant Containing No Lead and Bromide
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Low Profile (<0.7 mm)
Dual Sided Cooling Compatible
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Ultra Low Package Inductance
Optimized for High Frequency Switching
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Ideal for CPU Core DC-DC Converters
Optimized for both Sync.FET and some Control FET
application聛
Low Conduction and Switching Losses
Compatible with existing Surface Mount Techniques
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100% Rg tested
Typical values (unless otherwise specified)
DirectFET聶 Power MOSFET
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R
DS(on)
Q
gs2
1.7nC
V
DSS
Q
g
tot
V
GS
Q
gd
4.0nC
R
DS(on)
Q
oss
10nC
25V max 鹵20V max 3.8m鈩 10V 6.7m鈩 4.5V
Q
rr
14nC
V
gs(th)
1.9V
12nC
SQ
MT
MP
DirectFET聶 ISOMETRIC
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
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SQ
SX
ST
MQ
MX
Description
The IRF6712SPbF combines the latest HEXFET廬 Power MOSFET Silicon technology with the advanced DirectFET
TM
packaging to achieve
the lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is
compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection
soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET pack-
age allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6712SPbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and
switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF6712SPbF has been optimized for parameters that are critical in synchronous buck
operating from 12 volt bus converters including Rds(on) and gate charge to minimize losses.
Absolute Maximum Ratings
Parameter
V
DS
V
GS
I
D
@ T
A
= 25擄C
I
D
@ T
A
= 70擄C
I
D
@ T
C
= 25擄C
I
DM
E
AS
I
AR
12
Typical RDS(on) (m鈩?
Max.
Units
V
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
g
e
e
f
脙g
h
VGS, Gate-to-Source Voltage (V)
25
鹵20
17
13
68
130
13
13
14.0
12.0
10.0
8.0
6.0
4.0
2.0
0.0
0
5
10
15
20
25
30
ID= 13A
VDS= 20V
VDS= 13V
A
mJ
A
10
8
6
4
2
0
2
3
4
5
6
7
8
TJ = 25擄C
T J = 125擄C
ID = 17A
9 10 11 12 13 14 15 16
35
VGS, Gate -to -Source Voltage (V)
Notes:
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Click on this section to link to the appropriate technical paper.
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Click on this section to link to the DirectFET Website.
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Surface mounted on 1 in. square Cu board, steady state.
Fig 1.
Typical On-Resistance Vs. Gate Voltage
QG Total Gate Charge (nC)
Fig 2.
Typical Total Gate Charge vs Gate-to-Source Voltage
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T
C
measured with thermocouple mounted to top (Drain) of part.
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Repetitive rating; pulse width limited by max. junction temperature.
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Starting T
J
= 25擄C, L = 0.14mH, R
G
= 25鈩? I
AS
= 13A.
www.irf.com
1
07/21/08
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