PD - 96917
DirectFET聶 Power MOSFET
聜
Typical values (unless otherwise specified)
l
l
l
l
l
l
l
l
IRF6619
Low Profile (<0.7 mm)
V
DSS
V
GS
R
DS(on)
R
DS(on)
Dual Sided Cooling Compatible
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20V max 鹵20V max 1.65m鈩 10V 2.2m鈩 4.5V
Ultra Low Package Inductance
Q
g tot
Q
gd
Q
gs2
Q
rr
Q
oss
V
gs(th)
Optimized for High Frequency Switching above 1MHz
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Ideal for CPU Core DC-DC Converters
38nC
13nC
3.5nC
18nC
22nC
2.0V
Optimized for Sync. FET socket of Sync. Buck Converter聛
Low Conduction Losses
Compatible with existing Surface Mount Techniques
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MX
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
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SQ
SX
ST
MQ
MX
MT
MX
DirectFET聶 ISOMETRIC
Description
The IRF6619 combines the latest HEXFET廬 Power MOSFET Silicon technology with the advanced DirectFET
TM
packaging to achieve the
lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET package is compatible with
existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering tech-
niques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual
sided cooling to maximize thermal transfer in power systems, IMPROVING previous best thermal resistance by 80%.
The IRF6619 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching
losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors
operating at higher frequencies. The IRF6619 has been optimized for parameters that are critical in synchronous buck operating from 12 volt
buss converters including Rds(on), gate charge and Cdv/dt-induced turn on immunity. The IRF6619 offers particularly low Rds(on) and high
Cdv/dt immunity for synchronous FET applications.
Absolute Maximum Ratings
Parameter
V
DS
V
GS
I
D
@ T
A
= 25擄C
I
D
@ T
A
= 70擄C
I
D
@ T
C
= 25擄C
I
DM
E
AS (Thermally limited)
I
AR
E
AR
6.0
Typical R DS (on) (m鈩?
Max.
20
鹵20
30
24
150
240
240
See Fig. 14, 15, 17a, 17b,
VGS, Gate-to-Source Voltage (V)
Units
V
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, V
GS
Continuous Drain Current, V
GS
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
e
h
@ 10V
h
@ 10V
k脙
(
Package Limited
)
f
12
10
8
6
4
2
0
0
20
ID= 16A
A
脙e
mJ
A
mJ
Repetitive Avalanche Energy
e
5.0
4.0
3.0
2.0
1.0
2.0
TJ = 25擄C
TJ = 125擄C
ID = 30A
VDS = 16V
VDS= 10V
4.0
6.0
8.0
VGS, Gate-to-Source Voltage (V)
10.0
40
60
80
100
Notes:
Fig 1.
Typical On-Resistance Vs. Gate Voltage
QG Total Gate Charge (nC)
Fig 2.
Typical Total Gate Charge vs Gate-to-Source Voltage
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Click on this section to link to the appropriate technical paper.
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Click on this section to link to the DirectFET Website.
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Repetitive rating; pulse width limited by max. junction temperature.
聞
Limited by T
Jmax
, starting T
J
= 25擄C, L = 0.86mH, R
G
= 25鈩? I
AS
=
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Surface mounted on 1 in. square Cu board, steady state.
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T
C
measured with thermocouple mounted to top (Drain) of part.
24A, V
GS
=10V. Part not recommended for use above this value.
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