PD - 97012
IRF6610
DirectFET鈩?Power MOSFET
Typical values (unless otherwise specified)
Lead and Bromide Free
Low Profile (<0.7 mm)
Dual Sided Cooling Compatible
Ultra Low Package Inductance
Optimized for High Frequency Switching
Ideal for CPU Core DC-DC Converters
Optimized for both Sync.FET and some Control FET
application
Low Conduction and Switching Losses
Compatible with existing Surface Mount Techniques
V
DSS
Q
g
tot
V
GS
Q
gd
3.6nC
R
DS(on)
Q
gs2
1.3nC
R
DS(on)
Q
oss
5.9nC
20V max 鹵20V max 5.2m鈩 10V 8.2m鈩 4.5V
Q
rr
6.4nC
V
gs(th)
2.1V
11nC
SQ
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MX
MT
MP
DirectFET鈩?ISOMETRIC
Description
The IRF6610 combines the latest HEXFET廬 Power MOSFET Silicon technology with the advanced DirectFET
TM
packaging to achieve the
lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is compatible
with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering
techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows
dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6610 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching
losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors
operating at higher frequencies. The IRF6610 has been optimized for parameters that are critical in synchronous buck operating from 12 volt
buss converters including Rds(on) and gate charge to minimize losses in the control FET socket.
Absolute Maximum Ratings
Parameter
V
DS
V
GS
I
D
@ T
A
= 25擄C
I
D
@ T
A
= 70擄C
I
D
@ T
C
= 25擄C
I
DM
E
AS
I
AR
30
Typical RDS(on) (m鈩?
Max.
20
鹵20
15
12
66
120
13
12
VGS, Gate-to-Source Voltage (V)
Units
V
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
6.0
5.0
4.0
3.0
2.0
1.0
0.0
0
2
4
ID= 12A
A
mJ
A
25
20
15
10
5
0
3
4
5
T J = 25擄C
6
7
8
ID = 15A
VDS= 16V
VDS= 10V
T J = 125擄C
9
10
6
8
10
12
14
16
VGS, Gate -to -Source Voltage (V)
Fig 1.
Typical On-Resistance vs. Gate Voltage
Notes:
Click on this section to link to the appropriate technical paper.
Click on this section to link to the DirectFET Website.
Surface mounted on 1 in. square Cu board, steady state.
QG Total Gate Charge (nC)
Fig 2.
Typical Total Gate Charge vs Gate-to-Source Voltage
T
C
measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature.
Starting T
J
= 25擄C, L = 0.18mH, R
G
= 25鈩? I
AS
= 12A.
www.irf.com
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05/25/05
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