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IR2110E4 Datasheet

  • IR2110E4

  • HIGH AND LOW SIDE DRIVER

  • 14頁(yè)

  • IRF

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PD - 60086B
IR2110E4
HIGH AND LOW SIDE DRIVER
Features
n
Floating channel designed for bootstrap
operation
Fully operational to +400V
Tolerant to negative transient voltage
dV/dt immune
n
Gate drive supply range from 10 to 20V
n
Undervoltage lockout for both channels
n
Separate logic supply range from 5 to 20V
Logic and power ground 鹵5V offset
n
CMOS Schmitt-triggered inputs with pull-down
n
Cycle by cycle edge-triggered shutdown logic
n
Matched propagation delay for both channels
n
Outputs in phase with inputs
Product Summary
V
OFFSET
I
O
+/-
V
OUT
t
on/off
(typ.)
Delay Matching
400V max.
2A / 2A
10 - 20V
120 & 94 ns
10 ns
Description
The IR2110E4 is a high voltage, high speed power MOSFET
and IGBT driver with independent high and low side refer-
enced output channels. Proprietary HVIC and latch immune
CMOS technologies enable ruggedized monolithic construc-
tion. Logic inputs are compatible with standard CMOS or
LSTTL outputs. The output drivers feature a high pulse
current buffer stage designed for minimum driver cross-con-
duction. Propagation delays are matched to simplify use in
high frequency applications. The floating channel can be
used to drive an N-channel power MOSFET or IGBT in the
high side configuration which operates up to 400 volts.
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All
voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissi-
pation ratings are measured under board mounted and still air conditions. Additional information is shown
in Figures 28 through 35.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
DD
V
SS
V
IN
dV
S
/dt
P
D
R
thJA
T
j
T
S
T
L
Parameter
High Side Floating Supply Absolute Voltage
High Side Floating Supply Offset Voltage
High Side Output Voltage
Low Side Fixed Supply Voltage
Low Side Output Voltage
Logic Supply Voltage
Logic Supply Offset Voltage
Logic Input Voltage (HIN, LIN & SD)
Allowable Offset Supply Voltage Transient (Fig. 16)
Package Power Dissipation @ T
A
鈮?/div>
= 25擄C (Fig. 19)
Thermal Resistance, Junction to Ambient
Junction Temperature
Storage Temperature
Package Mounting Surface Temperature
Weight
Min.
Max.
Units
-0.5
V
S
+ 20
鈥?/div>
400
V
S
-0.5
V
B
+ 0.5
-0.5
20
-0.5
V
CC
+ 0.5
-0.5
V
SS
+ 20
V
CC
- 20
V
CC
+ 0.5
V
SS
- 0.5
V
DD
+ 0.5
鈥?/div>
50
鈥?/div>
1.6
鈥?/div>
125
-55
125
-55
150
300 (for 5 seconds)
0.45 (typical)
V
V/ns
W
擄C/W
擄C
g
www.irf.com
1
4/19/99

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