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IP1202 Datasheet

  • IP1202

  • Dual Output Full Function 2 Phase Synchronous Buck Power Blo...

  • 29頁

  • IRF

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PD-94593C
iP1202
Dual Output Full Function 2 Phase
Synchronous Buck Power Block
Features
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5.5V to 13.2V input voltage
0.8V to 5V output voltage
2 Phase Synchronous Buck Power Block
180擄 out of phase operation
Single or Dual output capability
Dual 15A maximum load capability
Single 2 phase 30A maximum load capability
200-400kHz per channel nominal switching frequency
Over Current Hiccup or Over Current Latch
External Synchronization Capable
Overvoltage protection
Individual soft start per outputs
Over Temperature protection
Internal features minimize layout sensitivity *
Ease of layout
Very small outline 15.5mm x 9.25mm x 2.6mm
Integrated Power Semiconductors,
PWM Control & Passives
iP1202 Power Block
Description
The iP1202 is a fully optimized solution for medium current synchronous buck applications requiring up to 15A
or 30A. The iP1202 is optimized for 2 phase single output applications up to 30A or dual output, each up to
15A with interleaved input. It includes full function PWM control, with optimized power semiconductor chip-sets
and associated passives, achieving high power density. Very few external components are required to create
a complete synchronous buck power supply.
iPOWIR technology offers designers an innovative space-saving solution for applications requiring high power
densities. iPOWIR technology eases design for applications where component integration offers benefits in
performance and functionality. iPOWIR technology solutions are also optimized internally for layout, heat
transfer and component selection.
iP1202 Configurations
Channel 1
V
IN
V
OUT
V
IN
V
OUT
Channel 2
V
OUT
Single Output
Dual Output
* Although, all of the difficult PCB layout and bypassing issues have been addressed with the internal design of the iPOWIR block, proper layout techniques
should be applied for the design of the power supply board. The iPOWIR block will function normally, but not optimally without any additional input decoupling
capacitors. Input decoupling capacitors should be added at Vin pin for stable and reliable long term operation. See layout guidelines in datasheet for more
detailed information.
www.irf.com
10/28/04
1

IP1202 產(chǎn)品屬性

  • 10

  • 集成電路 (IC)

  • PMIC - 穩(wěn)壓器 - DC DC 開關(guān)穩(wěn)壓器

  • iPOWIR™

  • 降壓（降壓）

  • 可調(diào)式

  • 2

  • 0.8 V ~ 5 V

  • 5.5 V ~ 13.2 V

  • -

  • 200kHz ~ 400kHz

  • 30A

  • 是

  • -40°C ~ 125°C

  • 表面貼裝

  • 198-BGA（161 凸塊）

  • 散裝

  • BGA（15.5x9.25）

  • *IP1202

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