音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

IP101 Datasheet

  • IP101

  • PHY 10/100M Single Chip Fast Ethernet Transceiver

  • 33頁

  • ETC

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

IP101
Single port 10/100 Fast Ethernet Transceiver
1.0 Features
壟
壟
壟
壟
壟
壟
壟
壟
壟
壟
壟
壟
壟
壟
壟
壟
壟
壟
2.0 General Description
IP101 is an IEEE 802.3/802.3u compliant single-port
Fast Ethernet Transceiver for both 100Mbps and
10Mbps operations. It supports Auto MDI/MDIX
function to simplify the network installation and reduce
the system maintenance cost. To improve the system
performance, IP101 provides a hardware interrupt pin
to indicate the link, speed and duplex status change.
IP101 also provides Media Independent Interface (MII)
/ Serial Network Interface (SNI) or Reduced Media
Independent Interface (RMII) to connect with different
types of 10/100Mb Media Access Controller (MAC).
IP101 is designed to use category 5 unshielded
twisted-pair cable or Fiber-Optic cables connecting to
other LAN devices. A PECL interface is supported to
connect with an external 100Base-FX fiber optical
transceiver.
IP101 Transceiver is fabricated with advanced CMOS
technology, which the chip only requires 3.3V as
power supply and consumes very low power in the
Auto Power Saving mode. IP101 can be implemented
as Network Interface Adapter with RJ-45 for
twisted-pair connection or MAU for Fiber Connection.
It can also be easily implemented into HUB, Switch,
Router, Access Point, Advanced Communication
Riser (ACR) and Communication and Networking
Riser (CNR).
10/100Mbps TX/FX
Full-duplex or half-duplex
Supports Auto MDI/MDIX function
Fully compliant with IEEE 802.3/802.3u
Supports IEEE 802.3u auto-negotiation
Supports MII / RMII / SNI interface
IEEE 802.3 full duplex control specification
Supports Automatic Power Saving mode
Supports
BaseLine
Wander
(BLW)
compensation
Supports Interrupt function
Supports repeater mode
Single 3.3V power supply with built-in 2.5V
regulator
DSP-based PHY Transceiver technology
Using either 25MHz crystal or 50MHz
REF_CLK as clock source
Flexible LED display for speed, duplex, link,
activity and collision
Supports flow control to communicate with
other MAC through MDC and MDIO
0.25u, CMOS technology
48-pin LQFP
Copyright 漏 2003, IC Plus Corp.
Confidential, All rights reserved.
Advanced, Specification subject to change without notice
1 / 33
IP101-DS-R0.02
Feb. 24, 2003
NOT APPROVED BY TECHNICAL DOCUMENT CONTROL

IP101相關(guān)型號(hào)PDF文件下載

您可能感興趣的PDF文件資料

熱門IC型號(hào)推薦

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋
返回頂部

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動(dòng)力！意見一經(jīng)采納，將有感恩紅包奉上哦！