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INF8594E Datasheet

  • INF8594E

  • 512 x 8-Bit CMOS EEPROM with I2C-Bus Interface

  • 100.94KB

  • 2頁(yè)

  • INTEGRAL

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ICs for TV-SETS
INF8594E
512 x 8-Bit CMOS EEPROM with I
2
C-Bus Interface
The INF8594E-2 is a 4-Kbit (512 x 8-bit) floating gate electrically erasable programmable read only memory
(EEPROM). By using an internal redundant storage code it is fault tolerant to single bit errors. This feature dramatically
increases reliability. IC works in systems with serial
2
I C-bus which consists of 2 lines: for data -serial data input/output (SDA) and for clock - serial clock input (SCL). Up to four
2
INF8594E-2 devices may be connected to the I C-bus.The programming
of the array is implemented by electron鈥檚 tunneling. The programming voltage is generated on-chip, using a voltage multiplier.
Power consumption is low owing to the full CMOS technology used. Device is functionally identical to the PCF8594E-2, Philips.
IC are made in 8-pin DIP and 8-pin SOP.
FEATURES
鈾?/div>
Low Power CMOS
maximum active current 2.5 mA
maximum standby current 10
碌A(chǔ)
鈾?/div>
Non-volatile storage of 4-Kbits organized as two pages each 256 x 8-bits
鈾?/div>
Single supply (Ucc=4,5 B - 5,5 B)
鈾?/div>
On-chip voltage multiplier
2
鈾?/div>
Serial input/output I C-bus
鈾?/div>
Automatically added word address
鈾?/div>
Internal timer for writing (no external components)
100 000 ERASE/WRITE cycles per byte;
鈾?/div>
Write operations
-byte write mode
-8-byte page write mode (minimizes total write time per byte)
鈾?/div>
Write protection input
鈾?/div>
Read operations
sequential read
random read
鈾?/div>
Power-on reset
鈾?/div>
High reliability by using a redundant storage code (single bit error correction)
鈾?/div>
Endurance
0
100 k; T
amb
=85 C
10 years non-volatile data retention time
鈾?/div>
Pin and Address compatible to PCx8582x-2 Family and PCx8598x2 Family
0
0
鈾?/div>
Temperature range: -40 C
+85 C
PIN ASSIGNMENT
PIN DESCRIPTION
SYMBOL
WP
A1
A2
Uss
SDA
SCL
PTC
Ucc
PIN
1
2
3
4
5
6
7
8
DESCRIPTION
WRITE protection input
address input 1
address input 2
蘆GND祿
Informational line, input/output
Clock line, input
programming management
Supply voltage
WP
A1
1
2
3
4
8
7
6
5
Ucc
PTC
SCL
SDA
A2
Uss
1
INTEGRAL

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