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IN74HCT74A Datasheet

  • IN74HCT74A

  • Dual D Flip-Flop with Set and Reset High-Performance Silicon...

  • 5頁(yè)

  • INTEGRAL

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TECHNICAL DATA
IN74HCT74A
Dual D Flip-Flop with Set and Reset
High-Performance Silicon-Gate CMOS
The IN74HCT74A is identical in pinout to the LS/ALS74. This
device may be used as a level converter for interfacing TTL or NMOS
outputs to High Speed CMOS inputs.
This device consists of two D flip-flops with individual Set, Reset,
and Clock inputs. Information at a D-input is transferred to the
corresponding Q output on the next positive going edge of the clock
input. Both Q and Q outputs are available from each flip-flop. The Set
and Reset inputs are asynchronous.
鈥?/div>
TTL/NMOS Compatible Input Levels
鈥?/div>
Outputs Directly Interface to CMOS, NMOS, and TTL
鈥?/div>
Operating Voltage Range: 4.5 to 5.5 V
鈥?/div>
Low Input Current: 1.0
碌A(chǔ)
ORDERING INFORMATION
IN74HCT74AN Plastic
IN74HCT74AD SOIC
T
A
= -55擄 to 125擄 C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Set
L
H
L
PIN 14 =V
CC
PIN 7 = GND
H
H
H
H
Reset
H
L
L
H
H
H
H
L
H
Clock
X
X
X
Data
X
X
X
H
L
X
X
Outputs
Q
H
L
H
*
H
L
Q
L
H
H
*
L
H
No Change
No Change
H
H
X
No Change
*Both outputs will remain high as long as Set and
Reset are low, but the output states are
unpredictable if Set and Reset go high
simultaneously.
X = don鈥檛 care
84

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