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IN74HC393 Datasheet

  • IN74HC393

  • DUAL 4-STAGE BINARY RIPPLE COUNTER High-Performance Silicon-...

  • 6頁

  • INTEGRAL

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IN74HC393
D
UAL
4-S
TAGE
B
INARY
R
IPPLE
C
OUNTER
High-Performance Silicon-Gate CMOS
The IN74HC393 is identical in pinout to the LS/ALS393. The
device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LS/ALSTTL outputs.
This device consists of two independent 4-bit binary ripple
counters with parallel outputs from each counter stage. A梅256
counter can be obtained by cascading the two binary counters.
Internal flip-flops are triggered by high-to-low transitions of the
clock input. Reset for the counters is asynchronous and active-
high. State changes of the Q outputs do not occur
simultaneously becaue of internal ripple delays. Therefore,
decoded output signals are subject to decoding spikes and
should not be used as clocks or as strobes except when gated
with the Clock of the IN74HC393.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0
碌A(chǔ)
High Noise Immunity Characteristic of CMOS Devices
鈥?/div>
鈥?/div>
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ORDERING INFORMATION
IN74HC393N Plastic
IN74HC393D SOIC
T
A
= -55擄 to 125擄 C for all
packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 14 =V
CC
PIN 7 = GND
FUNCTION TABLE
Inputs
Outputs
Clock Reset
X
H
L
H
L
No Change
L
L
No Change
L
No Change
L
Advance to
Next State
X = don鈥檛 care
1

IN74HC393相關(guān)型號(hào)PDF文件下載

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    AND-Gated J-K Master-Slave Flip-Flops with Reset and Clear
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