IN74ACT74
D
UAL
D F
LIP
-F
LOP WITH
S
ET AND
R
ESET
High-Speed Silicon-Gate CMOS
The IN74ACT74 is identical in pinout to the LS/ALS74,
HC/HCT74. The IN74ACT74 may be used as a level converter
for interfacing TTL or NMOS outputs to High Speed CMOS
inputs.
This device consists of two D flip-flops with individual Set,
Reset, and Clock inputs. Information at a D-input is transferred to
the corresponding Q output on the next positive going edge of
the clock input. Both Q and Q outputs are available from each
flip-flop. The Set and Reset inputs are asynchronous.
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TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0
碌A(chǔ);
0.1
碌A(chǔ)
@ 25擄C
Outputs Source/Sink 24 mA
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ORDERING INFORMATION
IN74ACT74N Plastic
IN74ACT74D SOIC
T
A
= -40擄 to 85擄 C for all
packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Outputs
Set Rese Clock
Data
Q
Q
t
L
H
X
X
H
L
H
L
X
X
L
H
*
L
L
X
X
H
H
*
H
H
H
H
L
H
H
L
L
H
H
H
L
X
No Change
H
H
H
X
No Change
H
H
X
No Change
*Both outputs will remain high as long as Set
and Reset are low, but the output states are
unpredictable if Set and Reset go high
simultaneously.
X = don鈥檛 care
PIN 14 =V
CC
PIN 7 = GND
1
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