鈥?/div>
Supports Pentium Processors.
3 Hi Drive CPU clocks.
Up to 8 SDRAM clocks for 2 DIMMs.
Supports Power Management.
7 PCI synchronous clocks.
Optional common or mixed supply mode:
(Vdd = Vddq3 = Vddq2 = 3.3V) or
(Vdd = Vddq3 = 3.3V, Vddq2 = 2.5V)
< 250ps skew CPU and SDRAM clocks.
< 250ps skew among PCI clocks.
I
2
C 2-Wire serial interface
Programmable registers featuring:
- enable/disable each output pin
- mode as tri-state, test, or normal
- 24/48 MHz selections
1 IOAPIC clock for multiprocessor support.
48-pin SSOP and TSSOP package
Spread Spectrum
Technology for up to
13dB of EMI reduction
廬
1
66.6*
*Spread Spectrum mode capable
CONNECTION DIAGRAM
IMISG571D
REF1
REF0
Vss
Xin
Xout
MODE
Vddq3
PCICLK_F
PCICLK0
Vss
PCICLK1
PCICLK2
PCICLK3
PCICLK4
Vddq3
PCICLK5
Vss
SEL
SDATA
SDCLK
Vddq3
48/24MHZ
48/24MHZ
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
Vdd
REF2
Vddq2
IOAPIC0
PWR_DWN#
Vss
CPUMCLK0
CPUCLK
Vddq2
CPUMCLK1
N/C
Vss
SDRAM0
SDRAM1
Vddq3
SDRAM2
SDRAM3
Vss
SDRAM4
SDRAM5
Vddq3
SDRAM6/CPU_STOP#
SDRAM7/PCI_STOP#
Vdd
BLOCK DIAGRAM
Buffers
Xin
Xout
REF
OSC
Vddq2
IOAPIC0
Buffer
SDATA
SDCLK
Vddq2
3
Buffers
Vddq3
8
Buffers
6
Buffers
PCI_STOP#
CPU_STOP#
PWR_DWN#
MODE
PCICLK_F
Buffer
CPUMCLK (0:1)
CPUCLK
SDRAM0~7
PCICLK0~5
3
REF0,1,2
SEL
PLL1
dly
Buffer
48/24MHZ
PLL2
Buffer
48/24MHZ
Purchase of I C components of International Microcircuits, Inc. or one
of its sublicensed Associated Companies conveys a license under the
2
2
Philips I C Patent Rights to use these components in an I C system,
2
provided that the system conforms to the I C Standard Specification
as defined by Philips.
2
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571
Rev.1.4
8/10/98
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