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IMISC670DYB Datasheet

  • IMISC670DYB

  • CPU System Clock Generator

  • 12頁

  • ETC

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SC670
I
2
C Clock Generator for Pentium Notebook Designs.
Approved Product
PRODUCT FEATURES
SEL
FREQUENCY TABLE
CPU
60.0
66.6
PCI
30.0
33.3
0
1
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Supports Pentium & Pro CPUs.
4 CPU clocks up to 8 loads.
Up to 8 SDRAM clocks for 2 DIMs.
Supports Power Savings Frequencies.
7 PCI synchronous clocks.
Optional common or mixed supply mode:
(Vdd = Vddq3 = Vddq2 = 3.3V) or
(Vdd = Vddq3 = 3.3V, Vddq2 = 2.5V)
< 250ps skew CPU and SDRAM clocks.
< 250ps skew among PCI clocks.
I
2
C 2-Wire serial interface
Programmable registers featuring:
- enable/disable each output pin
- mode as tri-state, test, or normal
- 24/48 MHz selections
1 IOAPIC clock for multiprocessor support.
48-pin SSOP package
CONNECTION DIAGRAM
IMISC670
REF1
REF0
Vss
Xin
Xout
MODE
Vddq3
PCICLK_F
PCICLK0
Vss
PCICLK1
PCICLK2
PCICLK3
PCICLK4
Vddq3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
Vdd
N/C (See note 1)
Vddq2
IOAPIC0
PWR_DWN#
Vss
CPUCLK0
CPUCLK1
Vddq2
CPUCLK2
CPUCLK3
Vss
SDRAM0
SDRAM1
Vddq3
SDRAM2
SDRAM3
Vss
SDRAM4
SDRAM5
Vddq3
SDRAM6/CPU_STOP#
SDRAM7/PCI_STOP#
Vdd
BLOCK DIAGRAM
3
Xin
Xout
REF
OSC
Vddq2
IOAPIC0
REF0:1
PCICLK5
Vss
SEL
SDATA
SDCLK
Vddq3
48/24MHZ
48/24MHZ
Vss
SDATA
SDCLK
Vddq2
4
Vddq3
CPUCLK0~3
8
6
SDRAM0~7
PCICLK0~5
SEL
PLL1
dly
PCI_STOP#
CPU_STOP#
PWR_DWN#
MODE
PCICLK_F
48/24MHZ
PLL2
48/24MHZ
Note 1: N/C is a no connect pin. IMI product does
not
require CPU 3.3_2.5# select line to operate properly at
2.5 volts. This pin may be connected externally to Vdd
or Vss.
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571
Rev.1.4
6/20/97
Page 1 of 12

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