IMISC610
May 1996
SYSTEM CLOCK CHIP
CMOS PLL
PRODUCT FEATURES
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n
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FREQUENCY TABLE
S2
S1
0
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
CPU
50
55
75
75
50
55
60
66.6
PCI
a.32*
a.32*
a.32*
37.5
25
27.6
30
33.3
0
0
0
0
1
1
1
1
Supports Pentium and Cyrix CPU鈥檚.
8 host (CPU) clocks for additional SDRAM support.
Optional common or mixed supply mode :
(VDD = B1VDD = B2VDD = 5V)
(VDD = B1VDD = B2VDD = 3.3V)
(VDD = 5V, B1VDD = B2VDD = 3.3V)
(VDD = 5V, B1VDD = 5V, B2VDD = 3.3V)
(VDD = 5V, B1VDD = 3.3V, B2VDD = 5V)
< 250 pS skew on CPU buffers
< 250 pS skew on PCI buffers
60 mA buffer switching current
34 Pin SSOP package for minimum board space
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a.32 = Asynchronous PCI.
a.32 Operates only @ VDD = 5V
CONNECTION DIAGRAM
VDD
REF
24 MHz
48 MHZ
VSS
PCI1
PCI2
PCI3
VDD
PCI4
PCI5
PCI6
S2
LF2
AVSS
LF1
AVDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
XIN
XOUT
VSS
B2VDD
CPU8
CPU7
CPU6
CPU5
VSS
CPU4
CPU3
CPU2
CPU1
B1VDD
S0
S1
VSS
BLOCK DIAGRAM
XIN
REF
XOUT
LF1
REF
B1VDD
PLL1
S2
S1
S0
dly
B
B
B
4
CPU(1:4)
CPU(5:8)
4
B2VDD
6
PCI(1:6)
LF2
48MHz
PLL2
24MHz
APPLICATIONS
Pentium鈩?or Cyrix CPU鈥檚 with any available chipset
support for PCI systems.
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 ext. 275 FAX 408-263-6571
Rev. 1.0
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