鈥?/div>
Lowest height (3.5mm) in this package footprint.
Shielded construction.
Frequency range up to 5.0MHz.
Lowest DCR/碌H, in this package size.
Handles high transient current spikes without saturation.
Ultra low buzz noise, due to composite construction.
100% Lead (Pb)-free and RoHS compliant.
PDA/Notebook/Desktop/Server applications.
High current POL converters.
Low profile, high current power supplies.
Battery powered devices.
DC/DC converters in distributed power systems.
DC/DC converter for Field Programmable Gate Array (FPGA).
APPLICATIONS
Manufactured under one or more of the following:
US Patents; 6,198,375 / 6,204,744 / 6,449,829 / 6,460,244.
Several foreign patents, and other patents pending.
STANDARD ELECTRICAL SPECIFICATIONS
Lo
DCR m
鈩?/div>
DCR m
鈩?/div>
HEAT RATING
INDUCTANCE TYPICAL MAX
CURRENT
碌
H
鹵
20%
25
擄
C
25
擄
C
DC AMPS
3
@100KHz, .25V, 0A
TYPICAL
0.10
0.8
0.96
43
0.15
1
1.2
41
0.22
1.1
1.3
38.5
0.33
1.3
1.5
36.5
0.47
1.6
2
32
0.60
1.8
2.2
29
0.68
2.3
2.5
28
0.82
2.6
3
25
1.0
3.3
3.5
24
1.5
5.1
5.5
19
1.8
6.5
7
16.5
2.2
7.2
8
16
3.3
11
12
12
4.7
14.3
15
10
5.6
17.1
18
9.5
6.8
19.8
22
9
8.2
24.8
28
8.5
10
30.4
34
7
SATURATION
CURRENT
DC AMPS
4
TYPICAL
84
75
65
62
55
51
49
44
40
35
30
29
27
24
19
18
16
14
DIMENSIONS
in inches [millimeters]
Typical Pad Layout
0.508
[12.9]
Max.
0.195
[4.95]
0.310
[7.87]
0.138
[3.5] Max.
0.091
鹵
0.01
[2.3
鹵
0.3]
0.542
[13.76]
0.185
鹵
0.01
[4.7
鹵
0.3]
0.520
鹵
0.015
[13.2
鹵
0.38]
Max.
The diagram above applies to values 0.6碌H and below.
Typical Pad Layout
0.508
[12.9]
Max.
0.542
[13.8]
0.128 [3.3]
0.318
[8.1]
0.087
鹵
0.01
[2.2
鹵
0.254]
0.118
鹵
0.01
[3.0
鹵
0.3]
NOTES:
1. All test data is referenced to 25擄C ambient.
2. Operating Temperature Range - 55擄C to + 125擄C
3. DC current (A) that will cause an approximate
鈭員
of 40擄C.
4. DC current (A) that will cause Lo to drop approximately 20%
5. The part temperature (ambient + temp rise) should not exceed
125擄C under worst case operating conditions. Circuit design,
component placement, PWB trace size and thickness, airflow
and other cooling provisions all affect the part temperature. Part
temperature should be verified in the end application.
0.138
[3.5] Max.
0.520
鹵
0.015
[13.2
鹵
0.38]
The diagram above applies to values 0.68碌H and above.
DESCRIPTION
IHLP-5050CE-01
MODEL
1.0
碌
H
INDUCTANCE
VALUE
鹵
20%
INDUCTANCE
TOLERANCE
ER
PACKAGE
CODE
e3
JDEC LEAD FREE
STANDARD
GLOBAL PART NUMBER
I
H
L
P
5
0
5
0
C
E
E
R
1
R
0
M
INDUCTANCE
TOLERANCE
0
1
SERIES
SIZE
MODEL
See the end of this data book for conversion tables
PACKAGE
CODE
INDUCTANCE
VALUE
Document Number 34105
Revision 03-Nov-04
For technical questions, contact Magnetics@vishay.com
www.vishay.com
15
VISHAY
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