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IFN425 Datasheet

  • IFN425

  • Dual N-Channel Silicon Junction Field-Effect Transistor

  • 1頁

  • INTERFET

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B-42
01/99
IFN424, IFN425, IFN426
Dual N-Channel Silicon Junction Field-Effect Transistor
樓 Very High Impedance
Differential Amplifiers
樓 Electrometers
Absolute maximum ratings at T
A
= 25隆C
Device Dissapation (Derate 3.2 mW/擄C to 50擄C)
Total Device Dissipation (Derate 6 mW/擄C to 150 擄C)
Storage Temperature Range
400 mW
750 mW
鈥?60 擄C to 200 擄C
At 25擄C free air temperature:
Static Electrical Characteristics
Gate Source Breakdown Voltage
Gate to Gate Breakdown Voltage
Gate Reverse Current
Gate Operating Current
Gate Source Cutoff Voltage
Gate Source Voltage
Drain Saturation Current (Pulsed)
Dynamic Electrical Characteristics
Common Source Forward Transconductance
g
fs
IFN424, IFN425, IFN426
Min
V
(BR)GSS
BV
G1G2
I
GSS
I
G
V
GS(OFF)
V
GS
I
DSS
60
1800
鈥?0.4
鈥?40
鹵40
鈥?
鈥?
鈥?0.5
鈥?500
鈥?
鈥?2.9
Typ
鈥?60
Max
Unit
V
V
pA
nA
pA
pA
V
V
碌A(chǔ)
Process NJ01
Test Conditions
I
G
= 鈥?1 碌A(chǔ), V
DS
= 脴V
I
G
= 鈥?1 碌A(chǔ), I
D
= 脴A, I
S
= 脴A
V
GS
= 鈥?20V, V
DS
= 脴V
V
GS
= 鈥?20V, V
DS
= 脴V
V
DS
= 10V, I
D
= 30 碌A(chǔ)
V
DS
= 10V, I
D
= 30 碌A(chǔ)
V
DS
= 10V, I
D
= 1 nA
V
DS
= 10V, I
D
= 30 碌A(chǔ)
V
DS
= 10V, V
GS
= 脴 V
T
A
= +125擄C
T
A
= +125擄C
100
1500
3
3
1.5
20
70
1
碌S
碌S
pF
pF
nV/鈭欻z
V
DS
= 10V, V
GS
= 脴 V
V
DS
= 10V, I
D
= 30 碌A(chǔ)
V
DS
= 10V, V
GS
= 脴 V
V
DS
= 10V, V
GS
= 脴 V
V
DS
= 10V, I
D
= 30 碌A(chǔ)
V
DS
= 10V, I
D
= 30 碌A(chǔ)
R
G
= 1 M鈩?/div>
f = 1 kHz
f = 1 kHz
f = 1 MHz
f = 1 MHz
f = 10 Hz
f = 10 Hz
Common Source Output Conductance
Common Source Input Capacitance
Equivalent Short Circuit Input Noise Voltage
g
os
C
iss
e
N
NF
Common Source Reverse Transfer Capacitance
C
rss
Noise Figure
dB
Max - IFN424 IFN425 IFN426
Differential Gate Source Voltage
Differential Gate Source Voltage
With Temperature
|V
GS1
鈥?V
GS2
|
|V
GS1
鈥?V
GS2
|
10
10
15
25
25
40
mV
碌V/擄C
V
DG
= 10V, I
D
= 30 碌A(chǔ)
V
DG
= 10V, I
D
= 30 碌A(chǔ)
T
A
= 鈥?55擄C
T
B
= 25擄C
T
C
= 125擄C
鈭員
Min - IFN424 IFN425 IFN426
Common Mode Rejection Ratio
CMRR
90
80
80
dB
V
DG
= 10V to 20V, I
D
= 30 碌A(chǔ)
TO脨78 Package
See Section G for Outline Dimensions
Pin Configuration
1 Source 1, 2 Drain 1, 3 Gate 1, 4 Case,
5 Source 2, 6 Drain 2, 7 Gate 2,
8 Omitted
1000 N. Shiloh Road, Garland, TX 75042
(972) 487-1287
FAX
(972) 276-3375
www.interfet.com

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