鈥?/div>
4 FSK generators shared by all 8 channels
Two programmable chopper clocks
Notch filters for 12 kHz and 16 kHz frequencies
Master clock frequency selectable: 1.536 MHz, 1.544 MHz, 2.048
MHz, 3.072 MHz, 3.088 MHz, 4.096 MHz, 6.144 MHz, 6.176 MHz or
8.192 MHz
Advanced test capabilities
- 5 analog loopback tests
- 6 digital loopback tests
- Level metering function
High analog driving capability (300
鈩?/div>
AC)
CODEC identification
3 V digital I/O with 5 V tolerance
3.3 V single power supply
Operating temperature range: - 40擄C to + 85擄C
Package available: 128 pin TQFP
FUNCTIONAL BLOCK DIAGRAM
MPI
INT
RESET
CH1
VIN1
VOUT1
2 Inputs
2 I/Os
3 Outputs
Filter and A/D
D/A and Filter
General
Control Logic
CH5
Filter and A/D
D/A and Filter
VIN5
VOUT5
2 Inputs
2 I/Os
3 Outputs
SLIC Signaling
SLIC Signaling
CH2
CH3
DSP
Core
CH6
CH7
CH4
MCLK
CHCLK1
CHCLK2
CH8
DR1/DD
DR2
DX1/DU
DX2
PLL and Clock
Generation
Serial Interface
PCM/GCI Interface
CCLK
/TS
CS
CI/
CO
DOUBLE
FS BCLK
TSX1 TSX2
/FSC /DCL
The IDT logo is a registered trademark of Integrated Device Technology, Inc
INDUSTRIAL TEMPERATURE RANGE
1
錚?004
Integrated Device Technology, Inc.
JULY 19, 2004
DSC-6222/3
next